Omega PCI-DAS1002 - Manuals

2.3 RUN InstaCal Run the InstaCal program in order to test your board and configure it for run-time use. By configuring the board, you addinformation to the configuration file, cb.cfg, that is used by the Universal Library and other third-party data acquisitionpackages that use the Universal Library...

3.0 HARDWARE CONNECTIONS 3.1 CONNECTOR PIN DIAGRAM The PCI-DAS1000 series employ a 100 pin I/O connector. Please make accurate notes and pay careful attention to wireconnections. In a large system a misplaced wire may create hours of work ‘fixing’ problems that do not exist before the wiring error i...

4.0 ANALOG CONNECTIONS 4.1 ANALOG INPUTS Analog signal connection is one of the most challenging aspects of applying a data acquisition board. If you are an AnalogElectrical Engineer then this section is not for you, but if you are like most PC data acquisition users, the best way toconnect your ana...

Differential Inputs Differential inputs measure the voltage between two distinct input signals. Within a certain range (referred to as the commonmode range), the measurement is almost independent of signal source to PCI-DAS1000 ground variations. A differentialinput is also much more immune to EMI t...

WARNING If either the AC or DC voltage is greater than 10 volts, do not connect the PCI-DAS1000 to this signalsource. You are beyond the boards usable common mode range and will need to either adjust yourgrounding system or add special Isolation signal conditioning to take useful measurements. A gro...

Relying on the earth prong of a 120VAC for signal ground connections is not advised.. Differentground plugs may have large and potentially even dangerous voltage differentials. Remember that theground pins on 120VAC outlets on different sides of the room may only be connected in the basement.This le...

5.0 PROGRAMMING & SOFTWARE APPLICATIONS Your PCI-DAS1000 is supported by the powerful Universal Library. We strongly recommend that you take advantage ofthe Universal Library as you software interface. The complexity of the the registers required for automatic calibrationcombined with the PCI BI...

6.0 SELF-CALIBRATION OF THE PCI-DAS1000 The PCI-DAS1000 is shipped fully-calibrated from the factory with cal coefficients stored in nvRAM. At run time, thesecalibration factors are loaded into system memory and are automatically retrieved each time a different DAC/ADC range isspecified. The user ha...

6.1.2 Analog Outputs The calibration scheme for the Analog Out section is shown in Figure 2 below. This circuit is duplicated for both DAC0and DAC1 Figure 2 16 Trim Dac (Coarse) Trim Dac (Fine) Trim Dac (Coarse) Trim Dac (Fine) Analog-Out DAC Ref Trim Dac (Coarse) Trim Dac (Fine) 12 Gain Adj Trim Da...

7.0 PCI-DAS1000 REGISTER DESCRIPTION 7.1 REGISTER OVERVIEW PCI-DAS1000 operation registers are mapped into I/O address space. Unlike ISA bus designs, this board has several baseaddresses each corresponding to a reserved block of addresses in I/O space. As we mention in our programming chapter,we hig...

INT[1:0] General Interrupt Source selection bits. AD FIFO Not Empty 1 1 AD FIFO Half Full 0 1 End of Channel Scan 1 0 Not Defined 0 0 Source INT0 INT1 INTE Enables interrupt source selected via the INT[1:0] bits. 1 = Selected interrupt Enabled0 = Selected interrupt Disabled EOAIE Enables End-of-Acqu...

ADHFI Status bit of ADC FIFO Half-Full interrupt. Used during REP INSW operations.1 = Indicates an ADC Half-Full interrupt has been latched. FIFO has been filled with more than 255 samples.0 = Indicates an ADC Half-Full interrupt has not occurred. FIFO has not yet exceeded 1/2 of its total capacity....

The following tables summarizes all possible Offset/Range configurations : PCI-DAS1002 305 uV 8 0-1.25V 1 1 1 610 uV 4 0-2.5V 0 1 1 1.22 mV 2 0-5V 1 0 1 2.44 mV 1 0-10V 0 0 1 610 uV 8 ±1.25V 1 1 0 1.22 mV 4 ±2.5V 0 1 0 2.44 mV 2 ± 5V 1 0 0 4.88 mV 1 ±10V 0 0 0 Measurement Resolution Input Gain Input...

7.3.3 TRIGGER CONTROL/STATUS REGISTERBADR1 + 4 This register provides control bits for all ADC trigger modes. A Read/Write register. WRITE TS0 TS1 - - TGEN BURSTE PRTRG XTRCL - - - ARM FFM0 C0SRC - - 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TS[1:0] These bits select one-of-two possible ADC Trigger Sour...

The table below provides a summary of bit settings and operation. XTRIG # Samples <1/2 FIFO, Pre-Trigger Mode Via SW immediately 1 1 ADHF # Samples >1 FIFO Pre-Trigger Mode ---------------------------------- 1/2 FIFO < # Samples < 1 FIFO Pre-Trigger Mode Via SW when remaining count <1...

7.3.4 CALIBRATION REGISTER See "Calibrating The PCI-DAS1000" document for additional programming details. BADR1 + 6 This register controls all autocal operations. This is a Write-only register. WRITE - - - - - - - - SEL8800 SEL7376 - CSRC0 CSRC1 CSRC2 CALEN SDI 0 1 2 3 4 5 6 7 8 9 10 11 12 1...

7.3.5 DAC CONTROL/STATUS REGISTERBADR1 + 8 This register selects the DAC gain/range and update modes. This is a Write-only register. WRITE - DACEN - - - - - MODE DAC0R0 DAC0R1 DAC1R0 DAC1R1 - - - - 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 DACEN This bit enables the Analog Out features of the board.1 = ...

7.5 BADR3 The I/O Region defined by BADR3 contains data and control registers for the ADC Pacer, Pre/Post-Trigger Counters, UserCounters and Digital I/O bytes. The PCI-DAS1000 has two 8254 counter/timer devices. These are referred to as 8254Aand 8254B and are assigned as shown below: User Counter #5...

8254A COUNTER 2 DATA - ADC PACER DIVIDER UPPER BADR3 + 2 READ/WRITE D0 D1 D2 D3 D4 D5 D6 D7 0 1 3 2 4 5 6 7 Counter 1 provides the lower 16 bits of the 32-bit pacer clock divider. Its output is fed to the clock input of Counter 2which provides the upper 16-bits of the pacer clock divider. The clock ...

7.5.3 INDEX and USER COUNTER 4 DATA AND CONTROL REGISTERS 8254B COUNTER 0 DATA - ADC PRE-TRIGGER INDEX COUNTER(or user counter 4) BADR3 + 8 READ/WRITE D0 D1 D2 D3 D4 D5 D6 D7 0 1 3 2 4 5 6 7 Counter 0 of the 8254B device is a shared resource on the PCI-DAS1000. When not in ADC pre-trigger mode, the ...

8.0 ELECTRICAL SPECIFICATIONS (Typical specifications for 25 DegC unless otherwise specified.) 8.1 ANALOG INPUT SECTION A/D converter type 7800 Resolution 12 bits Programmable ranges PCI-DAS1001 ±10V, ±1V, ±0.1V, ±0.01V, 0 - 10V, 0 - 1V, 0 - 0.1V, 0 - 0.01V PCI-DAS1002 ±10V, ±5V, ±2.5V, ±1.0V, 0 - 1...

8.4 COUNTER SECTION Counter type 82C54 Configuration Two 82C54 devices. 3 down counters per 82C54, 16 bits each 82C54A: Counter 0 - ADC residual sample counter. Source: ADC Clock. Gate: Internal programmable source. Output: End-of-Acquisition interrupt. Counter 1 - ADC Pacer Lower Divider Source: 10...

EC Declaration of Conformity Description Part Number High speed analog I/O board for the PCI bus PCI-DAS1000 to which this declaration relates, meets the essential requirements, is in conformity with, and CE marking has beenapplied according to the relevant EC Directives listed below using the relev...