Intel STL2 - Manuals - manualsarea.com

Page 2 - ii; Revision History; Disclaimers

Revision History STL2 Server Board TPS ii Revision History Date Revision Number Modifications 6/15/00 0.5 Initial release. 6/20/00 0.6 Updated connector reference designators 7/7/00 0.61 Updated silkscreen reference designators to agree with STL2 FAB2.Removed figure 2-3, IB6566 IRQ routing diagram. ...

Page 3 - iii; Table of Contents

STL2 Server Board TPS Table of Contents Revision 1.0 iii Table of Contents 1. Introduction .....................................................................................................................1-1 1.1 Purpose ...............................................................................

Page 4 - iv

Table of Contents STL2 Server Board TPS iv 3.5 Wake On LAN Function............................................................................................ 3-28 4. Basic Input Output System (BIOS) ...............................................................................4-29 4.1 BIOS Overvi...

Page 6 - List of Figures

List of Figures STL2 Server Board TPS vi List of Figures Figure 1-1. STL2 Server Board Block Diagram ....................................................................... 1-3 Figure 2-1. Embedded NIC PCI Signals ................................................................................ 2-11 ...

Page 7 - vii; List of Tables

STL2 Server Board TPS List of Tables Revision 1.0 vii List of Tables Table 2-1. STL2 Server Board Supported Processors ............................................................ 2-5 Table 2-2. SCSI Transfer Speeds .......................................................................................

Page 8 - viii

List of Tables STL2 Server Board TPS viii Table 4-26. POST Error Messages and Codes ..................................................................... 4-52 Table 4-27. Adaptec SCSI Utility Setup Configurations ......................................................... 4-57 Table 5-1. Jumper Block ...

Page 9 - STL2 Server Board Feature Overview; The STL2 server board provides the following features:

STL2 Server Board TPS Introduction Revision 1.0 1-1 1. Introduction 1.1 Purpose This document provides an architectural overview of the STL2 server board, including theboard layout of major components and connectors, and an overview of the server board’sfeature set. 1.2 Audience This document is wri...

Page 10 - Compatibility bus segment with three embedded devices.; STL2 Server Board Block Diagram

Introduction STL2 Server Board TPS 1-2 • 32-bit, 33 MHz, 5V keyed PCI segment with four expansion connectors and threeembedded devices. - Four 32-bit, 33 MHz, 5V keyed PCI expansion slots. - IB6566 South Bridge, which provides IDE and USB controller functions. - Integrated on-board Intel® EtherExpre...

Page 11 - North Bridge; STL2 Server Board Block Diagram; Figure 1-1. STL2 Server Board Block Diagram

STL2 Server Board TPS Introduction Revision 1.0 1-3 NB6635 North Bridge 3.0 LE IB6566 South Bridge 2 USB IDE STL2 Server Board Block Diagram STL2 Server Board Block Diagram 2 64bit/66Mhz, 3.3V PCI SCSI Adaptec* AIC7899 133 MHz System Bus PC133 Registered ECC SDRAM DIMMs PCI 32bit/33MHz BMC 80CH11 Su...

Page 13 - STL2 Server Board Architecture Overview; Intel® Pentium® III Processor Subsystem; Table 2-1. STL2 Server Board Supported Processors

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-5 2. STL2 Server Board Architecture Overview The architecture of the STL2 server board is based on a design that supports dual-processoroperation with Intel Pentium III processors and the ServerWorks ServerSet III LE chipse...

Page 15 - ServerWorks ServerSet III LE Chipset; Neither PC100 DIMMs nor non-ECC DIMMs can be used.

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-7 The boxed processor fan heatsink will keep the processor core at the recommended junctiontemperature, as long as airflow through the fan heatsink is unimpeded. It is recommended thatthe air temperature entering the fan in...

Page 16 - PCI Local Bus Specification

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-8 System memory begins at address 0 and is continuous (flat addressing) up to the maximumamount of DRAM installed (exception: system memory is noncontiguous in the ranges definedas memory holes using configuration registers). The server...

Page 17 - Table 2-3. Embedded SCSI Supported PCI Commands

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-9 Table 2-2. SCSI Transfer Speeds SCSI Port Asynchronous Fast-5 Fast-10 Fast-20 Fast-40 Fast-80/Ultra160 SE Yes yes yes yes no no LVD Yes yes yes yes yes yes In the STL2 server board implementation, channel A provides a 68-...

Page 18 - Bus speed up to 33 MHz

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-10 7. Defaults to Memory Write. The extensions to memory commands (memory read multiple, memory read line, and memorywrite and invalidate) work with the cache line size register to give the cache controller advanceknowledge of the minim...

Page 19 - Programmable transmit threshold for improved bus utilization.

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-11 The 82559 is a highly integrated PCI LAN controller for 10 or 100 Mbps Fast Ethernetnetworks. As a PCI bus master, the 82559 can burst data at up to 132 MBps. This high-performance bus master interface can eliminate the ...

Page 20 - Integrated physical interface to TX magnetics.; R a g e I I C

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-12 • Integrated physical interface to TX magnetics. • The magnetics component terminates the 100Base-TX connector interface. A flashdevice stores the network ID. • Support for Wake-on-LAN (WOL). 2.4.2.2 Video Controller The STL2 server ...

Page 21 - The Rage IIC supports the following PCI commands:; Table 2-4. Video Controller Supported PCI Commands

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-13 2.4.2.2.2 Video Controller PCI Commands The Rage IIC supports the following PCI commands: Table 2-4. Video Controller Supported PCI Commands Rage II C Support C/BE[3::0]_L Command Type Target Master 0000 Interrupt Acknow...

Page 23 - USB Specification; Chipset Support Components

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-15 2.4.2.3.3 USB Interface The IB6566 South Bridge contains a USB controller and USB hub. The USB controller movesdata between main memory and the two USB connectors provided. The STL2 server board provides a dual external ...

Page 25 - Interrupt Routing

STL2 Server Board TPS STL2 Server Board Architecture Overview Revision 1.0 2-17 2.5.2 BIOS Flash The STL2 baseboard incorporates an Intel ® 5V FlashFile™ 28F008SA Flash Memory component. The 28F008SA is a high-performance 8 Mbit memory that is organized as 1 MB of8 bits each. There are 16 64-KB bloc...

Page 28 - The STL2 server board PCI Ids are defined as follows:; Relationship between PCI IRQ and PCI Device

STL2 Server Board Architecture Overview STL2 Server Board TPS 2-20 2.6.3 PCI Ids The STL2 server board PCI Ids are defined as follows: Table 2-6. STL2 PCI IDs Device Bus Number [23:16] Device Number [15:11] Slot ID Signal NB6635 North Bridge 3.0LE 00h 00000b ATI* Rage IIC 00h 00010b P32_AD18 Intel 8...

Page 31 - Baseboard Management Controller

STL2 Server Board TPS Server Management Revision 1.0 3-23 3. Server Management This section describes the features of the server management subsystem for the STL2 serverboard. The server management subsystem consists of the BIOS, hardware, and firmwarefeatures built into the server board. These feat...

Page 32 - Monitors the event receiver

Server Management STL2 Server Board TPS 3-24 • Monitors the event receiver • Controls secure mode, inlucluding video blanding, diskett write-protect monitoring, andfornt panel lock/unlock initiation • Controls Wake-on-Lan via Magic Packet* support 3.2 Hardware Sensors The following table lists the h...

Page 35 - ACPI requires an operating system that supports this feature.

STL2 Server Board TPS Server Management Revision 1.0 3-27 Sensor Type Sensor TypeCode Sensor-SpecificOffset Event Remarks 04h CD-ROM boot completed The server has been booted (notsupported) OS Critical Stop 20h 00h Stop during OS load /Initialization OS stalled during startup 01h Run-time Stop OS st...

Page 36 - Power On; Wake On LAN Function

Server Management STL2 Server Board TPS 3-28 • s4: Hibernate or Save to Disk. The memory and machine state are saved to disk.Pressing the power button or another wakeup event restores the system state from thedisk and resumes normal operation. This assumes that no hardware changes weremade to the sy...

Page 38 - Advanced Configuration and Power Interface Specification

Basic Input Output System (BIOS) STL2 Server Board TPS 4-30 4.1.1 System BIOS The system BIOS is the core of the flash ROM-resident portion of the BIOS. The system BIOSprovides standard PC-BIOS services and support for some new industry standards, such asthe Advanced Configuration and Power Interfac...

Page 41 - Select Menu; Pressing the F9 key causes the following to appear:; Pressing F10 causes the following message to appear:; Setup Confirmation; Main Menu

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-33 ← ← → → Select Menu The left and right arrow keys are used to move between the major menu pages. The keys haveno affect if a submenu or pick list is displayed. F5/– Change Value The minus key and the F5 function key are used to...

Page 44 - Table 4-6. Memory Reconfiruation Submenu Selections

Basic Input Output System (BIOS) STL2 Server Board TPS 4-36 4.2.2.5 Advanced Menu Selections The following tables describe the menu options and associated submenus available on theAdvanced Menu. Please note that MPS 1.4 / 1.1 selection is no longer configurable. The BIOSwill always build MPS 1.4 tab...

Page 45 - Table 4-7. Peripheral Configuration Submenu Selections

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-37 Table 4-7. Peripheral Configuration Submenu Selections Feature Choices or Display Only Description User Setting Serial Port 1: (COM 1) Disabled3F8, IRQ3 3F8, IRQ4 2F8, IRQ32F8, IRQ43E8, IRQ33E8, IRQ42E8, IRQ32E8, IRQ4Auto Disab...

Page 50 - CMOS Memory Definition

Basic Input Output System (BIOS) STL2 Server Board TPS 4-42 3 Hard Drive Attempts to boot from a hard drive device. 4 Intel UNDI, PXE-2.0 Attempts to boot from a PXE server. Table 4-18. Hard Drive Selections Boot Priority Device Description User Setting 1 AIC-7899,CH B ID 1 1 Select the order in whi...

Page 51 - CMOS Default Override; On-board Video BIOS and SCSI BIOS

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-43 4.4 CMOS Default Override The BIOS detects the state of the CMOS default switch. If the switch is set to “CMOS Clear”prior to power-on or a hard reset, the BIOS changes the CMOS and NVRAM settings to adefault state. This guaran...

Page 52 - B = Rewrite Bootblock

Basic Input Output System (BIOS) STL2 Server Board TPS 4-44 To manually load a portion of the BIOS, the user must specify which data file(s) to load. Thechoices include • PLATCBLU.BIN • PLATCXLU.BIN • PLATCXXX.BIN • PLATCXLX.BIN • PLATCXXU.BIN The last three letters specify the functions to perform ...

Page 54 - Table 4-21. User Binary Area Scan Point Definitions

Basic Input Output System (BIOS) STL2 Server Board TPS 4-46 The following code fragment shows the header and format for a user binary: db 55h, 0AAh, 20h ; 16KB USER Area MyCode PROC FAR ; MUST be a FAR procedure db CBh ; Far return instruction db 04h ; Bit map to define call points, a 1 ; in any bit...

Page 55 - Table 4-22. Format of the User Binary Information Structure; the system requires 64 MB to boot). This

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-47 scan. Table 4-22. Format of the User Binary Information Structure Offset Bit Definition 0 Bit 0 = 1 if mandatory user binary, 0 if not mandatory. Ifa user binary is mandatory, it will always be executed. Ifa platform supports a...

Page 56 - Error Messages and Error Codes

Basic Input Output System (BIOS) STL2 Server Board TPS 4-48 mode operation, PHLASH (in non-interactive mode only) automatically updates only the mainsystem BIOS. PHLASH senses that STL2 is in recovery mode and automatically attempts toupdate the system BIOS Before powering up the system, the user mu...

Page 57 - One to four beeps are generated based on each group’s 2-bit pattern.

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-49 • The 8-bit test point is broken down to four 2-bit groups. • Each group is made one-based (1 through 4) • One to four beeps are generated based on each group’s 2-bit pattern. Example: Checkpoint 04Bh will be broken down to: 01...

Page 60 - Table 4-26. POST Error Messages and Codes

Basic Input Output System (BIOS) STL2 Server Board TPS 4-52 Table 4-25. Recovery BIOS Port-80 Codes CP Beeps Reason E0 Initialize chip set E1 Initialize bridge E2 Initialize processor E3 Initialize timer E4 Initialize system I/O E5 Check forced recovery boot E6 Validate checksum E7 Go to BIOS E8 Ini...

Page 63 - Identifying BIOS and BMC Revision Levels; Note; IPMI Version; Esc

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-55 3-3-1-4 Memory Not Detected — — 1-2 Option ROM Initialization Error Failure to initialize Option ROMBIOS Change system board or optionboard 1-2 Video configuration fails Failure to initialize VGA BIOS Change option video board ...

Page 64 - Adaptec SCSI Utility; Change default values; When the adapter is selected, the following options display.; Adaptec SCSI Utility Configuration Settings

Basic Input Output System (BIOS) STL2 Server Board TPS 4-56 4.8 Adaptec SCSI Utility The Adaptec SCSI Utility detects the SCSI host adapters on the server board. The AdaptecSCSI Utility is used to: • Change default values • Check and/or change SCSI device settings that may conflict with those of oth...

Page 65 - Table 4-27. Adaptec SCSI Utility Setup Configurations

STL2 Server Board TPS Basic Input Output System (BIOS) Revision 1.0 4-57 Key Action Arrows Up and down arrows move from one parameter to another within a screen. ENTER Displays options for a configurable parameter. Selects an option. ESC Moves back to previous screen or parameter or EXIT if at the M...

Page 66 - To exit the Adaptec SCSI Utility, the user presses the; key several times, until a message

Basic Input Output System (BIOS) STL2 Server Board TPS 4-58 2. Do not remove media from a removable media drive if it is under BIOS control. 4.8.3 Exiting Adaptec SCSI Utility To exit the Adaptec SCSI Utility, the user presses the Esc key several times, until a message prompts him / her to exit. If ...

Page 69 - Jumpers and Connectors; STL2 Server Board Jumper and Connector Locations; Figure 5-1. STL2 Server Board Jumper and Connector Locations; Jumper and connector location key for Figure 5-1:

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-61 5. Jumpers and Connectors STL2 Server Board Jumper and Connector Locations The following figure shows the location of the jumper blocks and connectors on the STL2Server board. Figure 5-1. STL2 Server Board Jumper and Connector Locations ...

Page 74 - Set the processor frequency jumpers as follows.; Table 5-3. Jumper Block 1J15 Default Settings; Setting Configuration Jumper Block 1L4

Jumpers and Connectors STL2 Server Board TPS 5-66 Table 5-2. Jumper Block 5E1 Settings Processor Frequency ( MHz) Jumper Settings 1-2 3-4 5-6 7-8 667 Not Jumpered Not Jumpered Jumpered Jumpered 733 Not Jumpered Not Jumpered Jumpered Not Jumpered 800 Jumpered Jumpered Not Jumpered Jumpered 867 Jumper...

Page 75 - Setting Configuration Jumper Block 6A

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-67 Table 5-4. Jumper Block 1L4 Settings Jumper Pin Numbers Function Jumper Position Function 1 – 2 FRB Open, Enabled Enables FRB Closed, Disabled Disables FRB 3 – 4 Front Cover Chassis IntrusionSensor Open, Enabled Enables Chassis Intrusion...

Page 77 - Table 5-10. Processor Fan Connector Pinout

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-69 5.2.4 System Fan Connectors (P29, P27, P11) • System Fan 1: P11 • System Fan 2: P27 • System Fan 3: P29 Table 5-9. Board Fan Connector Pinout Pin Signal 1 Fan Sense 2 + 12 VDC 3 COM 5.2.5 Processor Connectors (P12, P36) • Primary Process...

Page 79 - The keyboard and mouse connectors are functionally equivalent.; Table 5-15. Keyboard and Mouse Connector Pinouts

STL2 Server Board TPS Jumpers and Connectors Revision 1.0 5-71 Pin Signal Pin Signal 4 NC 12 DDCDAT 5 GND 13 HSYNC 6 GND 14 VSYNC 7 GND 15 DDCCLK 8 GND 5.2.10 Keyboard and Mouse Connectors The keyboard and mouse connectors are functionally equivalent. Table 5-15. Keyboard and Mouse Connector Pinouts...

Page 89 - Calculated Power Consumption; Table 6-1. STL2 Server Board Calculated Power Consumption

STL2 Server Board TPS Power Consumption Revision 1.0 6-81 6. Power Consumption 6.1 Calculated Power Consumption The following table shows the calculated power consumption for each of the power supplyvoltage rails for the STL2 server board. These values were calculated using the specificationsfor the...

Page 90 - Measured Power Consumption; Table 6-2. STL2 Server Board Measured Power Consumption

Power Consumption STL2 Server Board TPS 6-82 The total power calculation assumes a system configuration containing dual Pentium® III 1GHz processors with the VRM for both processors supplied by the 5V source, four 1 GHzDIMMs, all PCI slots containing 10W cards, two USB devices, keyboard & mouse,...

Page 91 - Mechanical Specifications

STL2 Server Board TPS Mechanical Specifications Revision 1.0 7-83 7. Mechanical Specifications The diagram on the following page shows the mechanical specifications of the STL2 serverboard. All dimensions are in inches. Connectors are dimensioned to pin 1.

Page 93 - Regulatory and Integration Information; Regulatory Compliance

STL2 Server Board TPS Regulatory and Integration Information Revision 1.0 8-85 8. Regulatory and Integration Information 8.1 Regulatory Compliance The STL2 server board complies with the following safety standard requirements. Table 8-1. Safety Regulations Regulation Title UL 1950/CSA950 Bi-National...

Page 94 - Installation Instructions; External I/O cable shielding and filtering.; Ensure Host Computer and Accessory Module Certifications

Regulatory and Integration Information STL2 Server Board TPS 8-86 • Intel’s UL File Number E139761 (Component side). • Battery “+” marking: located on the component side of the board in close proximity tothe battery holder. • CE Mark: (Component side) • Australian C-Tick Mark: Consists of solid circ...

Page 95 - Danger of explosion if battery is incorrectly replaced.

STL2 Server Board TPS Regulatory and Integration Information Revision 1.0 8-87 8.2.2.1 In Europe The CE marking signifies compliance with all relevant European requirements. If the hostcomputer does not bear the CE marking, obtain a supplier’s Declaration of Conformity to theappropriate standards re...

Page 96 - Sharp pins on connectors.; Environmental Limits; Table 8-2. Office System Environment Summary

Regulatory and Integration Information STL2 Server Board TPS 8-88 8.2.5 Use Only for Intended Applications This product was evaluated for use in ITE computers that will be installed in offices, schools,computer rooms and similar locations. The suitability of this product for other productcategories ...

Page 99 - Glossary

STL2 Server Board TPS Glossary Revision 1.0 I Glossary Term Definition ASIC Application Specific Integrated Circuit ASR Asynchronous Reset BMC Baseboard Management Controller BSP Bootstrap Processor EMP Emergency Management Port ESCD Extended System Configuration Data FRB Fault Resilient Booting FRU...

Page 100 - II; Reference Documents

Reference Documents STL2 Server Board TPS II Reference Documents • ServerWorks ServerSet* III LE North Bridge Specification. • ServerWorks ServerSet* III LE South Bridge Specification. • PCI Local Bus Specification , Revision 2.2. • USB Specification , Revision 1.0. • 5-Volt Flash File (28F008SAx8) ...

Page 101 - III; Index

STL2 Server Board EPS Index Revision 1.0 III Index A ACPI, 2-7, 3-23, 3-25, 3-26, 4-49, 5-73Adaptec* AIC7899, 1-1, 2-8Address, 2-9, 2-13, 2-17, 3-25, 4-39, 4-52AIC-7899, 2-8, 2-9, 2-10, 2-20, 4-40APIC, 2-6, 2-10, 2-14, 2-15, 2-17Architecture, 2-5ATI* Rage IIC, 2-12, 2-13, 2-20 B Baseboard Management...

Page 102 - IV

Index STL2 Server Board TPS IV ISA, 2-14, 2-15, 2-16, 2-17, 3-21, 3-24, 4-48 J JEDEC, 1-1, 2-7 L LED, 5-73Legacy, 2-15, 4-40Logo, 4-41LUN, 4-55 M Magic Packet, 3-22Main Menu, 4-29, 4-30, 4-31, 4-32Management Controller, 4-51, 4-53Memory, 2-5, 2-7, 2-9, 2-13, 2-17, 3-22, 3-24, 4-34, 4-40, 4-50, 4-51,...