Page 3 - Contents; Intel XScale
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 3 —Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Contents 1.0 Introduction .........................................................
Page 5 - ARM
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 5 —Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 3.6.11.2 SELDCSR JTAG Register.....................................................
Page 7 - Base Address Register, and PCI Memory Base Address
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 7 —Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 6.3 Initializing PCI Controller Configuration and Status Registers for Data Tran...
Page 8 - Intel
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor— Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 8 Order Number: 252480-006US 6.14.2.11DMA Control Register .....................................................
Page 17 - Figures
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 17 —Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 21.3 Functional Description ......................................................
Page 18 - 8 Byte Lane Routing During PCI Target Accesses of the AHB –
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor— Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 18 Order Number: 252480-006US 35 Initiated PCI TYPE 0 Configuration Read Cycle .................................
Page 19 - Tables
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 19 —Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor 86 T1 Transmit Frame .............................................................
Page 20 - Processor
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor— Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 20 Order Number: 252480-006US 38 TX RX Control Register (TXRXCTRL) .............................................
Page 23 - Revision History
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 23 —Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Revision History Date Revision Description September 2006 006 1. Added the 533M...
Page 26 - Introduction; About This Document; How to Read This Document; Familiarity with ARM; Other Relevant Documents; Number Representation
Intel ® IXP42X product line and IXC1100 control plane processors—Introduction Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 26 Order Number: 252480-006US 1.0 Introduction 1.1 About This Document This document is the main reference for the ext...
Page 27 - Acronyms and Terminology
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 27 Introduction—Intel ® IXP42X product line and IXC1100 control plane processors 1.3.2 Acronyms and Terminology Table 1. Acronyms and Terminology Acronym/ Terminology De...
Page 30 - Overview of Product Line; Figure 1
Intel ® IXP42X product line and IXC1100 control plane processors—Overview of Product Line Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 30 Order Number: 252480-006US 2.0 Overview of Product Line The Intel ® IXP42X Product Line of Network Proc...
Page 35 - North AHB; Bridge
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 35 Overview of Product Line—Intel ® IXP42X product line and IXC1100 control plane processors 2.1 Intel XScale ® Microarchitecture Processor The Intel XScale ® Processor ...
Page 36 - operations which accelerate many of the audio filter operations.; Figure 6
Intel ® IXP42X product line and IXC1100 control plane processors—Overview of Product Line Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 36 Order Number: 252480-006US The IXP42X product line and IXC1100 control plane processors have been equip...
Page 37 - Memory Management
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 37 Overview of Product Line—Intel ® IXP42X product line and IXC1100 control plane processors 2.1.1.3 Memory Management The Intel XScale processor implements the Memory M...
Page 38 - “Performance Monitoring” on page 133; Network Processor Functions
Intel ® IXP42X product line and IXC1100 control plane processors—Overview of Product Line Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 38 Order Number: 252480-006US 2.1.1.7 Intel XScale ® Processor Performance Monitoring Two performance-moni...
Page 39 - Internal Bus; achieve maximum efficiency.; MII Interfaces; implements the status flags and pointers required for each queue.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 39 Overview of Product Line—Intel ® IXP42X product line and IXC1100 control plane processors 2.3 Internal Bus The internal bus architecture of the Intel XScale processor...
Page 40 - For more information on the AHB Queue Manager, see; UTOPIA 2; For more information on the UTOPIA Level-2 interface, see; PCI; For more information on the PCI interface, see; Memory Controller
Intel ® IXP42X product line and IXC1100 control plane processors—Overview of Product Line Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 40 Order Number: 252480-006US communicated to the NPEs via the flag bus. Combined queue status for queues ...
Page 41 - Expansion Bus; Controller” on page 292; High-Speed Serial Interfaces; Speed Serial Interfaces” on page 448
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 41 Overview of Product Line—Intel ® IXP42X product line and IXC1100 control plane processors The memory controller only supports 32-bit memory. If a x16 memory chip is u...
Page 42 - Universal Asynchronous Receiver Transceiver; Asynchronous Receiver Transceiver (UART)” on page 332; GPIO; Controller” on page 398; Timers
Intel ® IXP42X product line and IXC1100 control plane processors—Overview of Product Line Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 42 Order Number: 252480-006US 2.12 Universal Asynchronous Receiver Transceiver The UART interfaces are 165...
Page 43 - For more information on the timers, see; For more information on JTAG, see
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 43 Overview of Product Line—Intel ® IXP42X product line and IXC1100 control plane processors For more information on the timers, see Section 14.0, “Timers” on page 408 ....
Page 44 - Memory Management Unit; “Exceptions” on page 47
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 44 Order Number: 252480-006US 3.0 Intel XScale ® Processor This chapter provides functional descriptions o...
Page 45 - are ignored when the MMU is disabled.; Memory Attributes; Bus Controller Configuration Register 1; Instruction Cache; associated memory region will be cached.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 45 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The attributes associated with a particular region of memory are configured ...
Page 46 - Details on Data Cache and Write Buffer Behavior; traffic to external memory. For more details on cache policies, see; Data Cache and Write Buffer; detailed in; Data Cache and Buffer Behavior When X = 0
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 46 Order Number: 252480-006US 3.1.1.2.2 Details on Data Cache and Write Buffer Behavior If the MMU is disa...
Page 47 - Memory Operation Ordering; issue a fence to impose a partial ordering on memory accesses.; Exceptions; “Event Architecture” on page 154; Interaction of the MMU, Instruction Cache, and Data Cache; The invalid combination will cause undefined results.; Data Cache and Buffer Behavior When X = 1; Memory Operations that Impose a Fence
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 47 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.1.1.2.4 Memory Operation Ordering A fence memory operation (memop) is one ...
Page 48 - MMU Control; instruction TLB can also be invalidated. See; Valid MMU and Data/Mini-Data Cache Combinations
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 48 Order Number: 252480-006US 3.1.3 MMU Control 3.1.3.1 Invalidate (Flush) Operation The entire instructio...
Page 49 - Locking Entries; “Cache Lock-Down Functions” on page 83; Example 1. Enabling the MMU
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 49 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.1.3.3 Locking Entries Individual entries can be locked into the instructio...
Page 50 - Example 3 on; Example 2. Locking Entries into the Instruction TLB
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 50 Order Number: 252480-006US Note: If exceptions are allowed to occur in the middle of this routine, the ...
Page 51 - Round-Robin Replacement Algorithm; back to entry 0 upon the next translation.; Example 3. Locking Entries into the Data TLB
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 51 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Note: Care must be exercised here when allowing exceptions to occur during t...
Page 52 - Figure 8; Operation When Instruction Cache is Enabled; “Instruction-Cache ‘Miss’” on page 53; Example of Locked Entries in TLB
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 52 Order Number: 252480-006US Only entries 0 through 30 can be locked in either TLB; entry 31can never be ...
Page 53 - “Memory; Instruction-Cache ‘Miss’; A miss causes the following:; Instruction Cache Organization; Example: 32K byte cache
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 53 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors A fetched line will be written into the cache if it is cacheable. Code is de...
Page 54 - instruction to the instruction decoder for execution.; Instruction-Cache Line-Replacement Algorithm; round-robin pointers for the other sets are affected in this case.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 54 Order Number: 252480-006US • A fetch buffer is allocated• The instruction cache sends a fetch request t...
Page 55 - Instruction-Cache Coherence; “Register; Example 4. Recovering from an Instruction Cache Parity Error
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 55 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors If a parity error occurs on an instruction that is locked in the cache, the ...
Page 56 - Table 18, “Cache Functions” on page 81; Example 5. Enabling the Instruction Cache
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 56 Order Number: 252480-006US The entire instruction cache along with the fetch buffers are invalidated by...
Page 57 - Figure 9; Locked Line Effect on Round-Robin Replacement
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 57 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors As a result: no fetches of cacheable code should occur while locking instruc...
Page 58 - Table 20, “Cache Lock-Down Functions” on page 83; Branch Target Buffer; executed branch along with two bits of history information.; Example 7. Locking Code into the Cache
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 58 Order Number: 252480-006US The Intel XScale processor provides a global unlock command for the instruct...
Page 59 - Figure 11, “Branch History” on page 59; Reset; BTB Entry; DATA; Branch History
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 59 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The BTB takes the current instruction address and checks to see if this addr...
Page 60 - “Register 1: Control and Auxiliary Control Registers” on; Data Cache; Data Cache Overview; Figure 12, “Data Cache Organization” on page 61
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 60 Order Number: 252480-006US A new entry is stored into the BTB when the following conditions are met: • ...
Page 61 - Figure 13, “Mini-Data Cache Organization” on page 62; Data Cache Organization
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 61 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors a cacheable write miss when write allocate is specified by its page attribut...
Page 62 - subsequently taken out when the bus is available.; Mini-Data Cache Organization; Example: 2K byte cache
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 62 Order Number: 252480-006US The Intel XScale processor employs an eight entry write buffer, each entry c...
Page 63 - “Cacheability” on page 63; Cacheability; “Cacheability” on
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 63 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors caching is specified for that area of memory. If the cache does not contain ...
Page 64 - written into the cache before it can complete.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 64 Order Number: 252480-006US If there is no outstanding fill request for that line, the current store req...
Page 65 - “Configuration” on page 73; Example 8. Enabling the Data Cache
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 65 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The data cache and mini-data cache are protected by parity to ensure data in...
Page 66 - Example 9
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 66 Order Number: 252480-006US A simple software routine is used to globally clean the data cache. It takes...
Page 67 - Example 9. Global Clean Operation
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 67 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Example 9. Global Clean Operation ; Global Clean/Invalidate THE DATA CACHE; ...
Page 68 - “New; Reconfiguring the Data Cache as Data RAM
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 68 Order Number: 252480-006US The line-allocate operation does not require physical memory to exist at the...
Page 69 - Example 10. Locking Data into Data Cache
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 69 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Example 10. Locking Data into Data Cache ; R1 contains the virtual address o...
Page 70 - Example 11. Creating Data RAM
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 70 Order Number: 252480-006US Example 11. Creating Data RAM ; R1 contains the virtual address of a region ...
Page 73 - Configuration
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 73 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors All reads and writes to external memory occur in program order when coalesci...
Page 74 - the values in those bits.; The format of LDC and STC for CP14 is shown in; Table 8; . LDC and STC follow the; performance monitoring registers are not accessible.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 74 Order Number: 252480-006US Unless otherwise noted, unused bits in coprocessor registers have unpredicta...
Page 75 - CP15 Registers; Table 9; LDC/STC Format when Accessing CP14
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 75 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.5.1 CP15 Registers Table 9 lists the CP15 registers implemented in Intel ®...
Page 76 - Register 0: ID and Cache Type Registers; register and a cache type register.; ID Register
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 76 Order Number: 252480-006US 3.5.1.1 Register 0: ID and Cache Type Registers Register 0 houses two read-o...
Page 77 - Register 1: Control and Auxiliary Control Registers; “Register 13: Process ID” on page 84; Cache Type Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 77 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.5.1.2 Register 1: Control and Auxiliary Control Registers Register 1 is ma...
Page 78 - cache attributes can be changed.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 78 Order Number: 252480-006US The mini-data cache attribute bits, in the Auxiliary Control Register, are u...
Page 79 - Register 2: Translation Table Base Register; Auxiliary Control Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 79 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.5.1.3 Register 2: Translation Table Base Register Table 13. Auxiliary Cont...
Page 80 - Register 3: Domain Access Control Register; in; Domain Access Control Register; Fault Status Register
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 80 Order Number: 252480-006US 3.5.1.4 Register 3: Domain Access Control Register 3.5.1.5 Register 4: Reser...
Page 81 - Register 6: Fault Address Register; Reads from this register, as with an MRC, have an undefined effect.; Fault Address Register; Cache Functions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 81 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.5.1.7 Register 6: Fault Address Register 3.5.1.8 Register 7: Cache Functio...
Page 82 - Register 8: TLB Operations; TLB Functions
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 82 Order Number: 252480-006US The line-allocate command allocates a tag into the data cache specified by b...
Page 83 - Register 10: TLB Lock Down; (The protocol for locking down entries can be found in; Cache Lock-Down Functions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 83 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Table 20 shows the command for locking down entries in the instruction and d...
Page 84 - Register 13: Process ID; virtual addresses are remapped and to what value.; The PID Register Affect On Addresses; A breakpoint address (see; TLB Lockdown Functions
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 84 Order Number: 252480-006US 3.5.1.12 Register 11-12: Reserved These registers are reserved. Reading and ...
Page 85 - Register 14: Breakpoint Registers; “Software Debug” on page 88; Register 15: Coprocessor Access Register; Accessing the Debug Registers
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 85 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.5.1.15 Register 14: Breakpoint Registers The Intel XScale processor contai...
Page 86 - Example 12. Disallowing access to CP0; Coprocessor Access Register; CP14 Registers
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 86 Order Number: 252480-006US Example 12. Disallowing access to CP0 3.5.2 CP14 Registers Table 27 lists th...
Page 87 - Performance Monitoring Registers; of these registers can be found in; Clock and Power Management Registers; not implemented and reserved for future use.; Accessing the Performance Monitoring Registers; PWRMODE Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 87 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.5.2.1 Performance Monitoring Registers The performance monitoring unit con...
Page 88 - Software Debug Registers; Software Debug; IXP42X product line and IXC1100 control plane processors, namely:; Clock and Power Management
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 88 Order Number: 252480-006US 3.5.2.3 Software Debug Registers Software debug is supported by address brea...
Page 89 - Definitions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 89 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors • Debug Handler SW requirements and suggestions 3.6.1 Definitions Debug hand...
Page 90 - Halt Mode; “SELDCSR JTAG Register” on page 103
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 90 Order Number: 252480-006US 3.6.3.1 Halt Mode When the debug unit is configured for halt mode, the reset...
Page 92 - the Special Debug State (see; Debug Exceptions; architecture defines the following debug exceptions:
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 92 Order Number: 252480-006US 3.6.4.3 Vector Trap Bits (TF,TI,TD,TA,TS,TU,TR) The Vector Trap bits allow i...
Page 93 - unit is configured for Halt mode or Monitor mode.; of the Halt mode bit.; Event Priority
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 93 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors • Exception vector trap • Trace-buffer full break When a debug exception occ...
Page 94 - “HW Breakpoint Resources” on page 95; Monitor Mode
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 94 Order Number: 252480-006US • CPSR[5] = 0 • CPSR[6] = 1• CPSR[7] = 1• PC = 0x0 Note: When the vector tab...
Page 95 - The processor ignores vector traps during monitor mode.; HW Breakpoint Resources; Instruction Breakpoints; may result in unpredictable behavior.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 95 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors • Instruction breakpoint• BKPT instruction The processor ignores vector trap...
Page 96 - processor sets the DBCR.moe bits to 0b001.; Data Breakpoints; one of two operations:; Instruction Breakpoint Address and Control Register (IBCRx)
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 96 Order Number: 252480-006US An instruction breakpoint will generate a debug exception before the instruc...
Page 97 - is used only when DBR0 is enabled.; Data Breakpoint Controls Register (DBCON)
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 97 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors When DBR1 is programmed as a data address mask, it is used in conjunction wi...
Page 98 - whether the processor is configured for monitor mode or halt mode.; Software Breakpoints; The processor handles the software breakpoint as described in; Transmit/Receive Control Register; “DBGTX JTAG Register” on page 105
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 98 Order Number: 252480-006US On a data breakpoint, the processor generates a debug exception and re-direc...
Page 99 - debugger continuously downloads data.; Normal RX Handshaking; High-Speed Download Handshaking States
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 99 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.8.1 RX Register Ready Bit (RR) The debugger and debug handler use the RR...
Page 100 - TX Handshaking
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 100 Order Number: 252480-006US 3.6.8.2 Overflow Flag (OV) The Overflow flag is a sticky flag that is set w...
Page 101 - Conditional Execution Using TXRXCTRL; Transmit Register; Table 41, “TX Handshaking” on page 100; TXRXCTRL Mnemonic Extensions; TX Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 101 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.8.5 Conditional Execution Using TXRXCTRL All of the bits in TXRXCTRL ar...
Page 102 - Receive Register; debugger through the JTAG interface.; Debug JTAG Access; SELDCSR, DBGTX and DBGRX. LDIC is described in; SELDCSR JTAG Command; RX Register
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 102 Order Number: 252480-006US 3.6.10 Receive Register (RX) The RX register is the receive buffer used by ...
Page 103 - SELDCSR JTAG Register; ), allowing the debugger to access the DCSR, generate an external; SELDCSR Hardware
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 103 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.11.2 SELDCSR JTAG Register Placing the “SELDCSR” JTAG instruction in th...
Page 104 - “Downloading Code in ICache” on page 116; SELDCSR Data Register; TDO
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 104 Order Number: 252480-006US 3.6.11.2.1 DBG.HLD_RST The debugger uses DBG.HLD_RST when loading code into...
Page 105 - Only bits specified as writable by JTAG in; DBGTX JTAG Command; debugger can receive data from the debug handler.; DBGTX JTAG Register; The DBGTX JTAG instruction selects the Debug JTAG Data register (; DBGTX Hardware; delay
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 105 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors A debugger sets an external debug break by scanning data into the DBG_SR wi...
Page 106 - The captured TX value is scanned out during the Shift_DR state.; DBGRX JTAG Command; loaded as shown in; DBGRX Hardware
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 106 Order Number: 252480-006US A Capture_DR loads the TX register value into DBG_SR[34:3] and TXRXCTRL[28]...
Page 107 - Rx Write Logic
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 107 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The captured data is scanned out during the Shift_DR state. Care must be ta...
Page 108 - DBGRX Data Register
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 108 Order Number: 252480-006US 3.6.11.6.3 DBG.RR The debugger uses DBG.RR as part of the synchronization t...
Page 109 - Debug JTAG Data Register Reset Values; not affect the DEBUG data register.; Trace Buffer; used for debugging an application. Two modes are supported:; Trace Buffer CP Registers; CP14 defines three registers (see; DEBUG Data Register Reset Values
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 109 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.11.6.5 DBG.RX DBG.RX is written into the RX register based on the outpu...
Page 110 - Checkpoint Registers; reference addresses to help reduce this problem.; CP 14 Trace Buffer Register Summary
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 110 Order Number: 252480-006US Any access to the trace buffer registers in User mode will cause an undefin...
Page 111 - unpredictable results.; Trace Buffer Entries; Message Byte; shows all of the possible trace messages.; TBREG Format; Message Byte Formats; C C C C
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 111 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.12.1.2 Trace Buffer Register (TBREG) The trace buffer is read through T...
Page 112 - Exception Message Byte; SW to identify which exception occurred.; Non-Exception Message Byte; type of message (refer to
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 112 Order Number: 252480-006US 3.6.13.1.1 Exception Message Byte When any kind of exception occurs, an exc...
Page 113 - and before the current one.; Address Bytes; Example 13. Rollover Messages Examples
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 113 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors of the instruction not matching the CC flags. In the case of back-to-back b...
Page 114 - Trace Buffer Usage; control plane processors) before the buffer can be parsed.; Indirect Branch Entry Address Byte Organization; High Level View of Trace Buffer
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 114 Order Number: 252480-006US 3.6.13.2 Trace Buffer Usage IXP42X product line and IXC1100 control plane p...
Page 115 - captures a trace up to the processor reset.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 115 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The trace buffer must be initialized prior to its initial usage, then again...
Page 116 - Downloading Code in ICache; functions are supported.; LDIC JTAG Command; instruction cache through JTAG.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 116 Order Number: 252480-006US 3.6.14 Downloading Code in ICache On IXP42X product line and IXC1100 contro...
Page 117 - LDIC JTAG Data Register; The data loaded into LDIC_SR1 during a Capture_DR is unpredictable.; LDIC JTAG Data Register Hardware; unpredictable
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 117 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.14.2 LDIC JTAG Data Register The LDIC JTAG Data Register is selected wh...
Page 118 - specified instruction cache at the specified virtual address.; LDIC Cache Functions
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 118 Order Number: 252480-006US 3.6.14.3 LDIC Cache Functions The IXP42X product line and IXC1100 control p...
Page 119 - As shown in; Loading IC During Reset; Format of LDIC Cache Functions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 119 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors All packets are 33 bits in length. Bits [2:0] of the first packet specify t...
Page 120 - “Dynamically Loading IC After Reset” on page 123; Loading IC During Cold Reset for Debug
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 120 Order Number: 252480-006US During a cold reset (in which both a processor reset and a JTAG reset occur...
Page 121 - Loading IC During a Warm Reset for Debug
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 121 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 2. Load the SELDCSR JTAG instruction into JTAG IR and scan in a value to se...
Page 122 - “LDIC Cache Functions” on page 118; Code Download During a Warm Reset For Debug
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 122 Order Number: 252480-006US As shown in Figure 27 , reset does not invalidate the instruction cache bec...
Page 123 - Dynamically Loading IC After Reset; “Loading IC During Reset”; Downloading Code in IC During Program Execution
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 123 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.14.5 Dynamically Loading IC After Reset An external host can load code ...
Page 124 - operation by the processor.; Dynamic Code Download Synchronization; the handler as shown below.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 124 Order Number: 252480-006US that line. Failure to invalidate a line prior to writing it may cause unpre...
Page 125 - entire handler to be dynamic.; Download
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 125 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors In a very simple debug handler stub, the above parts may form the complete ...
Page 126 - Mini-Instruction Cache Overview; details on the main instruction cache, see; Halt Mode Software Protocol; implementation techniques and requirements.; Starting a Debug Session; “Downloading Code in ICache” on
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 126 Order Number: 252480-006US Another possibility is for a more complete debug handler is downloaded duri...
Page 127 - debug exceptions correctly break to the debug handler.; Setting up Override Vector Tables; the reset vector, or
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 127 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors While the processor is still in reset, the debugger should set up the DCSR ...
Page 128 - “Debug Handler Restrictions” on page 128; Implementing a Debug Handler; Debug Handler Entry; “Halt Mode” on page 93
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 128 Order Number: 252480-006US For the indirect branch cases, a temporary scratch register may be necessar...
Page 129 - Dynamic Debug Handler; limitations and advantages.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 129 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.6.15.2.3 Dynamic Debug Handler On the IXP42X product line and IXC1100 con...
Page 130 - handler returns to the application (or the debugger overwrites it).
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 130 Order Number: 252480-006US If the dynamic function is already downloaded in the main instruction cache...
Page 131 - download. This removes the need for a counter in the debug handler.; Ending a Debug Session; Debug Handler Code: Download Bit and Overflow Flag
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 131 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The download bit acts as a branch flag, signalling to the handler to contin...
Page 132 - Software Debug Notes and Errata
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 132 Order Number: 252480-006US These actions ensure that the application program executes correctly after ...
Page 133 - Performance Monitoring; software programmers.; Overview; which is useful in measuring total execution time.; for more details on accessing these registers with MRC and
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 133 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.7 Performance Monitoring This section describes the performance monitorin...
Page 134 - Register Description; The format of CCNT is shown in; Performance Count Registers; There are four 32-bit event counters their format is shown in; Performance Monitoring Registers (Sheet 2 of 2)
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 134 Order Number: 252480-006US 3.7.2 Register Description 3.7.2.1 Clock Counter (CCNT) The format of CCNT ...
Page 135 - shows the format of the PMNC register.; Performance Monitor Control Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 135 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.7.2.3 Performance Monitor Control Register (PMNC) The performance monitor...
Page 136 - interrupt requesting for each counter.; Overflow Flag Status Register; Interrupt Enable Register
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 136 Order Number: 252480-006US 3.7.2.4 Interrupt Enable Register (INTEN) Each counter can generate an inte...
Page 137 - Event Select Register; EVTSEL is used to select events for PMN0, PMN1, PMN2 and PMN3. Refer to
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 137 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.7.2.6 Event Select Register (EVTSEL) EVTSEL is used to select events for ...
Page 138 - Managing the Performance Monitor
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 138 Order Number: 252480-006US 3.7.3 Managing the Performance Monitor The following are a few notes about ...
Page 139 - Performance Monitoring Events; Common Uses of the PMU
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 139 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.7.4 Performance Monitoring Events Table 60 lists events that may be monit...
Page 140 - Instruction Cache Efficiency Mode; “Register 7: Cache Functions” on page 81; Instruction Fetch Latency Mode
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 140 Order Number: 252480-006US performance statistics could be gathered (like hit rates, number of write-b...
Page 141 - Data/Bus Request Buffer Full Mode; Table 3.9, “Performance Considerations” on page 159
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 141 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.7.4.4 Data/Bus Request Buffer Full Mode The Data Cache has buffers availa...
Page 142 - Instruction TLB Efficiency Mode; Multiple Performance Monitoring Run Statistics
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 142 Order Number: 252480-006US • Total number of data write-back requests to external memory can be derive...
Page 143 - Example 14. Configuring the Performance Monitor; Example 15. Interrupt Handling
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 143 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Counter overflow can be dealt with in the IRQ interrupt service routine as ...
Page 144 - Programming Model; Big Endian versus Little Endian; Example 16. Computing the Results
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 144 Order Number: 252480-006US In the contrived example above, the instruction cache had a miss-rate of 5%...
Page 145 - Thumb; Base Register Update
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 145 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.8.2.2 26-Bit Architecture The Intel XScale processor does not support 26-...
Page 146 - Extensions to ARM; MRA provide the ability to read and write the 40-bit accumulator.; “Register 15: Coprocessor Access Register” on page 85; Multiply With Internal Accumulate Format
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 146 Order Number: 252480-006US 3.8.3 Extensions to ARM * Architecture The Intel XScale processor adds a fe...
Page 147 - Multiply with Internal Accumulate Format
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 147 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Two new fields were created for this format, acc and opcode_3. The acc fiel...
Page 148 - that was loaded into a general purpose register by LDRSH.; condition code status.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 148 Order Number: 252480-006US MIA does not support unsigned multiplication; all values in Rs and Rm will ...
Page 149 - interpreted as signed data values.; Internal Accumulator Access Format; accumulators in CP0.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 149 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The MIAxy instruction performs one16-bit signed multiply and accumulates th...
Page 150 - Coprocessor Access Register” on page 85
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Page 152 - This instruction executes in any processor mode.; New Page Attributes; “Memory Attributes” on page 45
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 152 Order Number: 252480-006US This instruction executes in any processor mode. 3.8.3.2 New Page Attribute...
Page 153 - the IXP42X product line and IXC1100 control plane processors.; Additions to CP15 Functionality; CP14 have been added or augmented. See; First-Level Descriptors
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 153 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors The TEX (Type Extension) field is present in several of the descriptor type...
Page 154 - not affect the correctness of their code.; Event Architecture; Exception Summary
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 154 Order Number: 252480-006US When setting multiple CP15 registers, system software may opt to delay the ...
Page 155 - “Software; Prefetch Aborts; These aborts are described in
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 155 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.8.3.4.2 Event Priority The Intel XScale processor follows the exception p...
Page 156 - Data Aborts; advanced beyond the instruction that caused the data abort.; Processors’ Encoding of Fault Status for Prefetch Aborts
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 156 Order Number: 252480-006US 3.8.3.4.4 Data Aborts Two types of data aborts exist in the Intel XScale pr...
Page 157 - Imprecise Data Aborts
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 157 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Imprecise Data Aborts • A data cache parity error is imprecise; the extende...
Page 158 - precautions are not necessary.; Events from Preload Instructions; Example 19 on; Example 18. Shielding Code from Potential Imprecise Aborts
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 158 Order Number: 252480-006US If a system design precludes events that could cause external aborts, then ...
Page 159 - Debug Events; Debug events are covered in; Performance Considerations; Interrupt Latency; Example 19. Speculatively issuing PLD
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 159 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.8.3.4.6 Debug Events Debug events are covered in “Debug Exceptions” on pa...
Page 160 - Branch Prediction; Performance Terms; Branch Latency Penalty
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 160 Order Number: 252480-006US Maximum Interrupt Latency can be reduced by: • Ensuring that the interrupt ...
Page 161 - Example 20. Computing Latencies
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 161 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors • Cycle Distance from A to B The cycle distance from cycle A to cycle B is ...
Page 162 - the SUB instruction. In; at cycle 5. thus the Result Latency is five.; Branch Instruction Timings; Latency Example
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 162 Order Number: 252480-006US the code fragment, there is a result dependency between the UMLAL instructi...
Page 163 - Multiply Instruction Timings; Multiply Instruction Timings (Sheet 1 of 2)
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 163 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.9.4.4 Multiply Instruction Timings CMN 1 1 2 2 CMP 1 1 2 2 EOR 1 1 2 2 MO...
Page 164 - Multiply Instruction Timings (Sheet 2 of 2)
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 164 Order Number: 252480-006US SMLAL Rs[31:15] = 0x00000 or Rs[31:15] = 0x1FFFF 0 2 RdLo = 2; RdHi = 3 2 1...
Page 165 - Saturated Arithmetic Instructions; Multiply Implicit Accumulate Instruction Timings
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 165 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.9.4.5 Saturated Arithmetic Instructions h 3.9.4.6 Status Register Access ...
Page 166 - Semaphore Instructions; Load and Store Multiple Instruction Timings
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 166 Order Number: 252480-006US 3.9.4.8 Semaphore Instructions 3.9.4.9 Coprocessor Instructions LDRSH 1 3 f...
Page 167 - Miscellaneous Instruction Timing; instructions, except for the cases listed below.; Optimization Guide; techniques presented in this document.; Exception-Generating Instruction Timings; Count Leading Zeros Instruction Timings
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 167 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.9.4.10 Miscellaneous Instruction Timing 3.9.4.11 Thumb Instructions In ge...
Page 168 - About This Section; Processors’ Pipeline; General Pipeline Characteristics; Number of Pipeline Stages
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 168 Order Number: 252480-006US 3.10.1.1 About This Section This guide assumes that you are familiar with t...
Page 169 - pipeline. These are shown in; Processors’ RISC Super-Pipeline; XWB; Mx; DWB; Main execution pipeline; Pipelines and Pipe Stages
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 169 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.2.1.2 Intel ® IXP42X Product Line of Network Processors and IXC1100 Co...
Page 170 - Register Scoreboarding; Instruction Flow Through the Pipeline
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 170 Order Number: 252480-006US While instructions are issued in-order, the main execution pipeline, memory...
Page 171 - Pipeline Stalls; Main Execution Pipeline; An understanding of the BTB (See
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 171 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.2.2.2 Pipeline Stalls The progress of an instruction can stall anywher...
Page 172 - The X1 pipe stage performs the following functions:; Memory Pipeline; memory pipeline handles load / store instructions.; D1 and D2 Pipe Stage; alignment occurs for byte and half-word loads.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 172 Order Number: 252480-006US The ID unit decodes the instruction and specifies which registers are acces...
Page 173 - Behavioral Description; “Instruction Latencies” on page 160; Basic Optimizations; Conditional Instructions; Optimizing Condition Checks
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 173 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.2.5 Multiply/Multiply Accumulate (MAC) Pipeline The Multiply-Accumulat...
Page 174 - the next loop iteration.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 174 Order Number: 252480-006US Code generated for the if condition without using an add instruction to set...
Page 175 - Optimizing Branches; c y c l e s
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 175 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.3.1.2 Optimizing Branches Branches decrease application performance by...
Page 177 - Vs using branches can be computed as follows:; Optimizing Complex Expressions; The optimized code for the if condition is:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 177 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors If we make the assumptions that both paths are equally likely to be taken a...
Page 178 - Bit Field Manipulation; optimized as follows:; Optimizing the Use of Immediate Values; operation whenever possible.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 178 Order Number: 252480-006US 3.10.3.2 Bit Field Manipulation The IXP42X product line and IXC1100 control...
Page 179 - Effective Use of Addressing Modes
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 179 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Multiplication by an integer constant that can be expressed as can similarl...
Page 180 - Cache and Prefetch Optimizations; Cache Miss Cost; dependent on reducing the cache miss rate.; Round Robin Replacement Cache Policy; distribute the code on a temporal evenness over this space.; Locking Code into the Instruction Cache
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 180 Order Number: 252480-006US 3.10.4 Cache and Prefetch Optimizations This section considers how to use t...
Page 181 - experimentation to optimize.; Data and Mini Cache; memory regions whose cache policies can be set by the user (see; Non-Cacheable Regions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 181 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors • Interrupt handlers• Real time clock handlers• OS critical code• Time crit...
Page 182 - Write-Through and Write-Back Cached Memory Regions; “Reconfiguring the Data Cache as Data RAM” on page 68
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 182 Order Number: 252480-006US 3.10.4.2.2 Write-Through and Write-Back Cached Memory Regions Write through...
Page 183 - the benefits of cached accesses.; Data Alignment
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 183 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.4.2.5 Mini-Data Cache The mini-data cache is best used for data struct...
Page 184 - Consider the following example:; Literal Pools; “Basic Optimizations” on page 173; Cache Considerations
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 184 Order Number: 252480-006US If the structure is not sized to a multiple of the cache line size, then th...
Page 185 - Memory Page Thrashing; Prefetch Considerations; memory type is enabled as write-allocate.; Prefetch Loop Limitations; use value of prefetch are discussed below.; Compute versus Data Bus Bound; bound loops allow complete hiding of all data transfer latencies.; Low Number of Iterations
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 185 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.4.3.2 Memory Page Thrashing Memory page thrashing occurs because of th...
Page 186 - Bandwidth Limitations; transfer resources are:; Cache Memory Considerations; enhance the spatial locality of the data.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 186 Order Number: 252480-006US 3.10.4.4.4 Bandwidth Limitations Overuse of prefetches can usurp resources ...
Page 187 - close. Array merging can place a and b specially close.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 187 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors In the above code, data is read from both arrays a and b, but a and b are n...
Page 188 - Cache Blocking; minimizing cache misses and reducing bus traffic.; Prefetch Unrolling; by prefetch unrolling. For example consider:
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 188 Order Number: 252480-006US 3.10.4.4.6 Cache Blocking Cache blocking techniques, such as strip-mining, ...
Page 189 - Pointer Prefetch; next iteration of the loop.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 189 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Unfortunately, prefetch loop unrolling does not work on loops with indeterm...
Page 190 - Loop Interchange; induction variable interchange. The above examples becomes:
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 190 Order Number: 252480-006US Note the order reversal of the prefetches in relationship to the usage. If ...
Page 191 - the data load frees the register for use. The example code becomes:; Instruction Scheduling; Scheduling Loads; to avoid this stall. Consider the following example:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 191 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.4.4.11 Prefetch to Reduce Register Pressure Pre-fetch can be used to r...
Page 192 - the unoptimized version.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 192 Order Number: 252480-006US Note that this rearrangement may not be always possible. Consider the follo...
Page 194 - on how these instructions may be used:
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 194 Order Number: 252480-006US sequentially should not exceed four. Also note that a preload instruction m...
Page 195 - achieved using the LDM instructions as shown below:; Scheduling Data Processing Instructions; code segment would incur a one-cycle stall for the MOV instruction:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 195 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors 3.10.5.1.2 Scheduling Load and Store Multiple (LDM/STM) LDM and STM instruc...
Page 196 - following segment of code:; Scheduling Multiply Instructions; values in registers r1 and r2 due to result latency.
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 196 Order Number: 252480-006US All data processing instructions incur a two cycle issue penalty and a two-...
Page 197 - Scheduling SWP and SWPB Instructions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 197 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Please refer to “Instruction Latencies” on page 160 to get the instruction ...
Page 198 - Scheduling the MIA and MIAPH Instructions
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 198 Order Number: 252480-006US The MAR (MCRR) instruction has an issue latency, a result latency, and a re...
Page 199 - Scheduling CP15 Coprocessor Instructions; Optimizing C Libraries; Space/Performance Trade Off
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 199 Intel XScale ® Processor—Intel ® IXP42X product line and IXC1100 control plane processors Consider the code sample: The ORR instruction above would incur a one cycle...
Page 200 - Multiple Word Load and Store; to consecutive addresses in memory whenever possible.; Use of Conditional Instructions; “Conditional Instructions” on page 173; Use of PLD Instructions
Intel ® IXP42X product line and IXC1100 control plane processors—Intel XScale ® Processor Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 200 Order Number: 252480-006US 3.10.7.1.1 Multiple Word Load and Store The LDM/STM instructions are one wo...
Page 203 - Processor Engine core to operate in parallel.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 203 Network Processor Engines (NPE)—Intel ® IXP42X product line and IXC1100 control plane processors are difficult for a processor to implement. The type of functions im...
Page 204 - Internal Bus Arbiters
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 204 Order Number: 252480-006US 5.0 Internal Bus The internal bus architecture of the Intel ® IXP42X Product Line of Ne...
Page 205 - Priority Mechanism; Memory Map; Bus Arbitration Example: Three Requesting Masters
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 205 Internal Bus—Intel ® IXP42X product line and IXC1100 control plane processors The arbiters also have the capability to handle split transfers. A split transfer is wh...
Page 208 - PCI Controller; The Intel
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 208 Order Number: 252480-006US 6.0 PCI Controller The Intel ® IXP42X Product Line of Network Processors and IXC1100 ...
Page 209 - Processors’ PCI Bus Configured as a Host
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 209 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors Figure 30. Processors’ PCI Bus Configured as a Host Figure 31. Processors’ PCI Bus Co...
Page 210 - diagram is given in; Processors’ PCI Controller Block Diagram; P C I B us
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 210 Order Number: 252480-006US The IXP42X product line and IXC1100 control plane processors PCI Controller block dia...
Page 211 - “PCI Controller DMA; PCI Target Interface Supported Commands
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 211 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors target interface — in conjunction with the target interface FIFOs — will use the Sout...
Page 212 - “PCI Controller Configured as Host” on; PCI Initiator Interface-Supported Commands
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 212 Order Number: 252480-006US pre-fetch CSR mechanism. Refer to “PCI Controller Configured as Host” on page 213 for...
Page 213 - configuration space that supports a single function.; PCI Controller Configured as Host; Controller to be enabled.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 213 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors gaining access to the South AHB Master Controller’s services, then the PCI Target int...
Page 214 - Type 0 Configuration Address Phase
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 214 Order Number: 252480-006US Once the PCI controller has determined that the mode of operation is to be host, the ...
Page 215 - bus cycle. However, these cycles can only be single cycle accesses.; Type 1 Configuration Address Phase
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 215 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors Configuration cycles will be produced by the IXP42X product line and IXC1100 control ...
Page 216 - what the PCI_NP_CBE register contains in the byte enable bits.; Example: Generating a PCI Configuration Write and Read; This value chosen for PCI_NP_AD follows the convention outlined in
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 216 Order Number: 252480-006US It is also noteworthy to mention that the PCI Controller does not interpret or manipu...
Page 217 - memory and PCI I/O transaction can now take place.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 217 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors memory transactions with no adverse side effects to reads. Only bits (31:26) would be...
Page 218 - PCI Controller Configured as Option; “PCI Controller Configured as Host” on page 213
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 218 Order Number: 252480-006US 6.2 PCI Controller Configured as Option The IXP42X product line and IXC1100 control p...
Page 219 - complete normally on the bus and return all zeroes.; Initializing PCI Controller Configuration and Status
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 219 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors An access to the IXP42X product line and IXC1100 control plane processors’ PCI Contro...
Page 220 - and the PCI Base Address Registers.
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 220 Order Number: 252480-006US processors. The IXP42X product line and IXC1100 control plane processors PCI Controll...
Page 221 - three bytes from the right of the PCI_AHBIOBASE =; PCI Memory Map Allocation
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 221 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors — BAR4 = 0xA4000000— BAR5 = 0xA5123400 3. An external PCI device initiates a PCI bus ...
Page 222 - Example: PCI Memory Base Address Register and South-AHB; The next example shows an access to the second 16-Mbyte window.; Initializing the PCI Controller Configuration Registers; Configuration and Status Registers:
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 222 Order Number: 252480-006US • Bits 31:24 of the PCI Memory Base Address Register (PCI_PCIMEMBASE) register corres...
Page 223 - and IXC1100 control plane processors.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 223 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors The IXP42X product line and IXC1100 control plane processors are a single-function, T...
Page 224 - to the PCI Configuration Space:; PCI Byte Enables Using CRP Access Method
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 224 Order Number: 252480-006US 1. An AHB master that wants to write a particular PCI Configuration Register writes P...
Page 225 - PCI Controller South AHB Transactions; PCI Configuration Space
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 225 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.5 PCI Controller South AHB Transactions The PCI Controller provides access to inter...
Page 226 - PCI Controller Functioning as Bus Initiator; PCI transactions in one of three ways:; memory cycle read of non-prefetch memory.
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 226 Order Number: 252480-006US Target Interface is used to accept transaction request from other AHB Masters. The AH...
Page 227 - Initiated Type-0 Read Transaction; this is a PCI Bus Configuration Read Cycle.; Initiated Type-0 Write Transaction; is a PCI Bus Configuration Write Cycle.; Initiated PCI TYPE 0 Configuration Read Cycle
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 227 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors The IXP42X product line and IXC1100 control plane processors will drive all the byte ...
Page 228 - Initiated Type-1 Read Transaction; Function 0, and Base Address Register 0.; Initiated PCI Type-0 Configuration Write Cycle; Initiated PCI Type-1 Configuration Read Cycle
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 228 Order Number: 252480-006US 6.6.4 Initiated Type-1 Read Transaction The following transaction is a PCI Configurat...
Page 229 - Initiated Type-1 Write Transaction; Function number 7, and Base Address Register 0.; Initiated Memory Read Transaction; asserted for the transaction.; Initiated PCI Type-1 Configuration Write Cycle
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 229 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.6.5 Initiated Type-1 Write Transaction The following transaction is a PCI Configura...
Page 230 - Initiated Memory Write Transaction; Initiated PCI Memory Read Cycle
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 230 Order Number: 252480-006US 6.6.7 Initiated Memory Write Transaction The following transaction is a PCI Memory Wr...
Page 231 - Initiated I/O Read Transaction; phase — signifies that this is a PCI Bus I/O Read Cycle.; Initiated I/O Write Transaction; Initiated PCI Memory Write Cycle; Initiated PCI I/O Read Cycle
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 231 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.6.8 Initiated I/O Read Transaction The following transaction is a PCI I/O Read Cycl...
Page 232 - Initiated Burst Memory Read Transaction; for the transaction.; Initiated PCI I/O Write Cycle
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 232 Order Number: 252480-006US implemented on the IXP42X product line and IXC1100 control plane processors. The tran...
Page 233 - Initiated Burst Memory Write Transaction; Initiated PCI Burst Memory Read Cycle
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 233 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.6.11 Initiated Burst Memory Write Transaction The following transaction is a two wo...
Page 234 - PCI Controller Functioning as Bus Target; processors. Please refer to; PCI Controller DMA Controller; Initiated PCI Burst Memory Write Cycle
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 234 Order Number: 252480-006US 6.7 PCI Controller Functioning as Bus Target The IXP42X product line and IXC1100 cont...
Page 236 - byte swap will occur on the DMA data.; AHB to PCI DMA Transfer Byte Lane Swapping
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 236 Order Number: 252480-006US Bit 28 of the Length Register is used to provide a byte swap on the DMA data as data ...
Page 238 - read starts towards completion.; AHB to PCI DMA Channel Operation; A DMA transfer from AHB to PCI is processed as follows:; PCI to AHB DMA Channel Operation; A DMA transfer from PCI to AHB is processed as follows:
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 238 Order Number: 252480-006US Assume that this DMA channel is enabled prior to the end of the first eight-word burs...
Page 239 - registers are updated.; PCI Controller Door Bell Register; interrupt to the Intel XScale processor.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 239 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors PCI_PTADMA0/1_LENGTH registers respectively. If the channel enable bit is set in the ...
Page 240 - PCI Controller Interrupts; PCI Interrupt Generation; “PCI Controller Door Bell Register” on page 239; Internal Interrupt Generation; Intel XScale processor at the occurrence of various events:
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 240 Order Number: 252480-006US The PCI Door Bell Register (PCI_PCIDOORBELL) register can only be written by the AHB....
Page 241 - • A Doorbell is “pushed” by an external PCI device; PCI Controller Endian Control; used as described previously.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 241 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors • A Doorbell is “pushed” by an external PCI device The PCI Interrupt Status Register ...
Page 243 - Byte Lane Routing During PCI Target Accesses of the AHB –
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 243 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors Figure 47. Byte Lane Routing During PCI Target Accesses of the AHB – AHB Configured a...
Page 244 - and
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 244 Order Number: 252480-006US In a similar fashion — as described for PCI Target accesses directed towards the IXP4...
Page 245 - Byte Lane Routing During AHB Memory Mapped Accesses of the PCI Bus –
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 245 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors Figure 49. Byte Lane Routing During AHB Memory Mapped Accesses of the PCI Bus – AHB C...
Page 246 - shows the byte lane routing between the PCI bus
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 246 Order Number: 252480-006US As described previously, during DMA transfers the DS bit in the DMA length registers ...
Page 247 - Status Registers or PCI Configuration Registers.; Byte Lane Routing During DMA Transfers
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 247 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors There is no byte-lane reversal process for accesses to PCI Controller Configuration a...
Page 248 - PCI Controller Clock and Reset Generation; A PCI startup sequence could be as follows:
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 248 Order Number: 252480-006US 6.12 PCI Controller Clock and Reset Generation The PCI Reset and PCI clock signals ca...
Page 249 - requirement of the PCI specification.; PCI RCOMP Circuitry; the Intel; Register Descriptions; PCI Configuration Registers; registers are described in; PCI Configuration Register Map (Sheet 1 of 2)
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 249 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 3. Wait 1ms to satisfy minimum reset assertion time of the PCI specification.4. Confi...
Page 250 - Device ID/Vendor ID Register; PCI Configuration Register Map (Sheet 2 of 2)
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 250 Order Number: 252480-006US 6.14.1.1 Device ID/Vendor ID Register (PCI_DIDVID) 6.14.1.2 Status Register/Control R...
Page 252 - Class Code/Revision ID Register
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 252 Order Number: 252480-006US 6.14.1.3 Class Code/Revision ID Register (PCI_CCRID) 6.14.1.4 BIST/Header Type/Latenc...
Page 253 - Base Address 0 Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 253 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.14.1.5 Base Address 0 Register (PCI_BAR0) Register PCI_BHLC Bits Name Description R...
Page 254 - Base Address 1 Register
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 254 Order Number: 252480-006US 6.14.1.6 Base Address 1 Register (PCI_BAR1) 6.14.1.7 Base Address 2 Register (PCI_BAR...
Page 255 - Base Address 3 Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 255 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.14.1.8 Base Address 3 Register (PCI_BAR3) 6.14.1.9 Base Address 4 Register (PCI_BAR...
Page 258 - PCI Controller Configuration and Status Registers; shows the address map for the Control and Status Register.; PCI Controller CSR Address Map
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 258 Order Number: 252480-006US 6.14.2 PCI Controller Configuration and Status Registers These registers are accessib...
Page 259 - PCI Controller Non-pre-fetch Address Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 259 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.14.2.1 PCI Controller Non-pre-fetch Address Register (PCI_NP_AD) 6.14.2.2 PCI Contr...
Page 260 - PCI Controller Non-Pre-fetch Write Data Register
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 260 Order Number: 252480-006US 6.14.2.3 PCI Controller Non-Pre-fetch Write Data Register (PCI_NP_WDATA) 6.14.2.4 PCI...
Page 261 - PCI Controller Configuration Port Write Data Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 261 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.14.2.6 PCI Controller Configuration Port Write Data Register (PCI_CRP_WDATA) Regist...
Page 262 - PCI Controller Configuration Port Read Data Register
Intel ® IXP42X product line and IXC1100 control plane processors—PCI Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 262 Order Number: 252480-006US 6.14.2.7 PCI Controller Configuration Port Read Data Register (PCI_CRP_RDATA) 6.14.2....
Page 263 - PCI Controller Interrupt Status Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 263 PCI Controller—Intel ® IXP42X product line and IXC1100 control plane processors 6.14.2.9 PCI Controller Interrupt Status Register (PCI_ISR) 4 ABE AHB big-endian addr...
Page 276 - SDRAM Controller
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 276 Order Number: 252480-006US 7.0 SDRAM Controller The SDRAM Controller performs data movement between the Intel ...
Page 277 - memory devices per each bank.; In t el
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 277 SDRAM Controller—Intel ® IXP42X product line and IXC1100 control plane processors As stated previously, the supported memory types for each bank of SDRAM must be 64M...
Page 278 - utilizing an internal refresh counter.; Supported Configuration of the SDRAM Controller
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 278 Order Number: 252480-006US To remove the need for SDRAM refreshes to be implemented by the Intel XScale proces...
Page 279 - transaction to the SDRAM.; SDRAM Memory Space; “Configuration Register 0” on page 322; Initializing the SDRAM Controller; Memory Space
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 279 SDRAM Controller—Intel ® IXP42X product line and IXC1100 control plane processors After decoding is complete, the SDRAM Controller completes the read or write transa...
Page 280 - would be attached when a two-bank configuration is written.
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 280 Order Number: 252480-006US to-data delay will be initialized to two clocks. The initial value in bit 3 will be...
Page 282 - signaling associated with this command.; SDRAM I/O For Various Commands
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 282 Order Number: 252480-006US Writing hexadecimal value 0x00000000 to address location 0xCC000008 will cause a Mo...
Page 283 - Initializing the SDRAM
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 283 SDRAM Controller—Intel ® IXP42X product line and IXC1100 control plane processors 7.2.1 Initializing the SDRAM Once the Intel XScale processor configures the SDRAM C...
Page 284 - followed by the issue of an auto-refresh command.; of writing to the configuration register of the SDRAM.; Page Register Allocation
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 284 Order Number: 252480-006US A page hit is valid if the memory location falls within the location as specified b...
Page 285 - SDRAM Memory Accesses; Read Transfer; incremented address.; Read Cycle Timing (CAS Latency of Two Cycles); Data Transfer Sizes of AHB; SDRAM Read Example (CAS Latency of 2 Cycles)
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 285 SDRAM Controller—Intel ® IXP42X product line and IXC1100 control plane processors 7.3 SDRAM Memory Accesses 7.3.1 Read Transfer When the AHBs generate a read transac...
Page 286 - Read Burst Transfer (Interleaved AHB Reads); Write Transfer; SDRAM Shared South AHB and North AHB Access
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 286 Order Number: 252480-006US 7.3.1.2 Read Burst Transfer (Interleaved AHB Reads) The timing diagram in Figure 56...
Page 287 - Configuration Register; with the same type of SDRAM devices.; SDRAM Write Example; SDRAM Register Overview
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 287 SDRAM Controller—Intel ® IXP42X product line and IXC1100 control plane processors 7.4 Register Description The IXP42X product line and IXC1100 control plane processo...
Page 288 - Refresh Register; applies to all types of SDRAM (asynchronous and synchronous).; Instruction Register
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 288 Order Number: 252480-006US 7.4.2 Refresh Register The refresh register (SDR_REFRESH) is a read/write register ...
Page 289 - SDRAM Configuration Options
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 289 SDRAM Controller—Intel ® IXP42X product line and IXC1100 control plane processors A “set mode register” command would write the following to the SDRAM. This is a sta...
Page 290 - SDRAM Burst Definitions
Intel ® IXP42X product line and IXC1100 control plane processors—SDRAM Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 290 Order Number: 252480-006US These are the commands issued by the memory controller to the SDRAM and are not acc...
Page 292 - Expansion Bus Controller
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 292 Order Number: 252480-006US 8.0 Expansion Bus Controller The Expansion Bus Controller provides an inter...
Page 293 - Expansion Bus Address Space; Processors’ Trimmed Version of the Memory Map
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 293 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors One of these general-purpose configuration registers is used to capture the...
Page 294 - lowest 256 Mbytes of address.; Chip Select Address Allocation
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 294 Order Number: 252480-006US When bit 31 of the Configuration Register 0 (EXP_CNFG0) is set to logic 1, ...
Page 295 - Address and Data Byte Steering; MBytes; Expansion Bus Memory Sizing
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 295 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors The right side of Figure 58 shows the implementation of bit 13:10 of the ea...
Page 296 - Expansion Bus Address and Data Byte Steering
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 296 Order Number: 252480-006US Table 118. Expansion Bus Address and Data Byte Steering South AHB Bus Cycle...
Page 297 - Expansion Bus Connections; Expansion Bus Peripheral Connection
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 297 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors 8.4 Expansion Bus Connections Figure 60 shows a typical connection for vari...
Page 298 - Expansion Bus Interface Configuration; Cycle Type that is selected. For more information refer to section; Expansion Bus Cycle Type Selection
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 298 Order Number: 252480-006US 8.5 Expansion Bus Interface Configuration There are eight registers — calle...
Page 300 - cycle prior to the end of the T1 phase.
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 300 Order Number: 252480-006US • T2 – Setup/Chip Select Timing• T3 – Strobe Timing• T4 – Hold Timing• T5 –...
Page 302 - not finish until Chip Select is deasserted by the processor.; I/O Wait Normal Phase Timing
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 302 Order Number: 252480-006US The T4 (Hold Timing) period is the time interval in which Chip Select will ...
Page 303 - Special Design Knowledge for Using HPI mode; function signal pins for HPI as shown in; I/O Wait Extended Phase Timing; Multiplexed Output Pins for HPI Operation
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 303 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors 8.7 Special Design Knowledge for Using HPI mode The Expansion Bus Controlle...
Page 304 - Registers are ignored.; HPI HCNTL Control Signal Decoding
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 304 Order Number: 252480-006US The byte identification signal, EX_HBIL, is used to determine the byte tran...
Page 305 - Expansion Bus Interface Access Timing Diagrams
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 305 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors 8.8 Expansion Bus Interface Access Timing Diagrams 8.8.1 Intel ® Multiplexe...
Page 319 - Timing and Control Registers for Chip Select 0; Section; Timing and Control Registers for Chip Select 1; Expansion Bus Register Overview
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 319 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors 8.9 Register Descriptions 8.9.1 Timing and Control Registers for Chip Selec...
Page 320 - Timing and Control Registers for Chip Select 2
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 320 Order Number: 252480-006US 8.9.3 Timing and Control Registers for Chip Select 2 8.9.4 Timing and Contr...
Page 321 - Timing and Control Registers for Chip Select 5
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 321 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors 8.9.6 Timing and Control Registers for Chip Select 5 8.9.7 Timing and Contr...
Page 322 - Configuration Register 0; assertion of the reset signal.; Bit Level Definition for each of the Timing and Control Registers
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 322 Order Number: 252480-006US 8.9.9 Configuration Register 0 At power up or whenever a reset is asserted,...
Page 323 - read only, all other bits may be written and read from the South AHB.; Configuration Register 0 Description
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 323 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors These configuration bits are made available to the system as outputs from t...
Page 324 - XScale processor speed will now be operating at.; User-Configurable Field; Configuration Register 1
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 324 Order Number: 252480-006US Once the boot sequence completes this bit is written to a ‘0,’ switching th...
Page 325 - Expansion Bus Configuration Register 1-Bit Definition
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 325 Expansion Bus Controller—Intel ® IXP42X product line and IXC1100 control plane processors Only two bits in Configuration Register 1 are currently defined. Under soft...
Page 326 - Expansion Bus Controller Performance; shows simulated expansion bus throughput.; Simulated Expansion Bus Performance
Intel ® IXP42X product line and IXC1100 control plane processors—Expansion Bus Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 326 Order Number: 252480-006US 8.10 Expansion Bus Controller Performance Table 127 shows simulated expansi...
Page 328 - the South AHB and the APB.
Intel ® IXP42X product line and IXC1100 control plane processors—AHB/APB Bridge Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 328 Order Number: 252480-006US 9.0 AHB/APB Bridge The APB Bridge is used to connect the high-speed AHB to the lower-...
Page 329 - APB Interface
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 329 AHB/APB Bridge—Intel ® IXP42X product line and IXC1100 control plane processors Figure 77. APB Interface W AN/VOICE NPE UTOPIA 2 HSS 0 HSS 1 ETHERNET NPE A MII 0 MDC...
Page 330 - Address Map for the APB
Intel ® IXP42X product line and IXC1100 control plane processors—AHB/APB Bridge Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 330 Order Number: 252480-006US § § Table 128. Address Map for the APB Offset Address Peripheral C8000000 – C8000FFF ...
Page 333 - High Speed UART; UART Timing Diagram; Start; Parity; LSB MSB; Bit Definition
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 333 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.1 High Speed UART The UARTs performs serial-to...
Page 334 - UART Block Diagram
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 334 Order Number: 252480-006US Figure 79. UART Block Diagram clk_uart rts_n cts_...
Page 335 - Configuring the UART; Setting the Baud Rate; register makes up the upper eight bits of the 16-bit divisor.; Typical Baud Rate Settings
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 335 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.2 Configuring the UART The following sections ...
Page 337 - against odd parity on the received data.; UART Transmit Parity Operation
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 337 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors The Even-Parity Select (EPS) Bit is used to deter...
Page 338 - Register is initialized to hexadecimal 0x60 after reset.; Using the Modem Control Signals; diagnostic testing of the UART.; UART Word-Length Select Configuration; • Data Terminal Ready
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 338 Order Number: 252480-006US The Line-Control Register is initialized to hexad...
Page 339 - UART Interrupts
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 339 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors Leaving loop-back mode and returning to normal mo...
Page 341 - Transmit FIFO is half empty or less.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 341 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors For example, the maximum time between a received ...
Page 342 - Transmitting and Receiving UART Data
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 342 Order Number: 252480-006US Receive Interface. Lines Status Register bits 1 t...
Page 343 - will be cleared autonomously when the reset has been completed.; UART FIFO Trigger Level
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 343 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors The error flags position will remain constant, in...
Page 344 - three most-significant bits of the byte are filled with zeros.); address locations in the; Receive Buffer Register; High-Speed UART Registers Overview
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 344 Order Number: 252480-006US If characters less than 8 bits are received, the ...
Page 345 - Transmit Holding Register; RBR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 345 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.4.2 Transmit Holding Register 10.4.3 Divisor L...
Page 346 - Divisor Latch High Register; “Modem; DLL
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 346 Order Number: 252480-006US 10.4.4 Divisor Latch High Register 10.4.5 Interru...
Page 347 - Interrupt Identification Register; IER
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 347 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.4.6 Interrupt Identification Register In order...
Page 348 - IIR
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 348 Order Number: 252480-006US 2 Receiver Time out occurred:It happens in FIFO m...
Page 349 - FIFO Control Register; UART IDD Bit Mapping
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 349 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.4.7 FIFO Control Register FCR is a write-only ...
Page 350 - Line Control Register; FCR
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 350 Order Number: 252480-006US 10.4.8 Line Control Register Register FCR Bits Na...
Page 351 - LCR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 351 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors Register LCR Bits Name Description 31:8 (Reserved...
Page 352 - Modem Control Register; MCR; — 0 = Normal UART operation; The OUT2 bit is used to mask the UARTs’ interrupt output to
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 352 Order Number: 252480-006US 10.4.9 Modem Control Register Register Name: MCR ...
Page 353 - Line Status Register; LSR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 353 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.4.10 Line Status Register Register Name: LSR H...
Page 354 - Modem Status Register; of the Interrupt Enable Register is set.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 354 Order Number: 252480-006US 10.4.11 Modem Status Register This register provi...
Page 355 - scratch-pad register for use by the programmer.; MSR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 355 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.4.12 Scratch-Pad Register This read/write regi...
Page 356 - Infrared Selection Register; Infrared Data Association Serial Infrared Specification.; SPR
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 356 Order Number: 252480-006US 10.4.13 Infrared Selection Register The Slow Infr...
Page 357 - Console UART; ISR; Console UART Registers Overview
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 357 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.5 Console UART The Console Universal Asynchron...
Page 359 - Divisor Latch Low Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 359 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.5.1.3 Divisor Latch Low Register 10.5.1.4 Divi...
Page 361 - Priority Levels of Interrupt Identification Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 361 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors Table 137. Priority Levels of Interrupt Identific...
Page 362 - UART Interrupt Identification Bit Level Definition
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 362 Order Number: 252480-006US 10.5.1.7 FIFO Control Register FCR is a write-onl...
Page 365 - The OUT2 bit is used to mask the UART’s interrupt output to
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 365 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.5.1.9 Modem Control Register Register Name: MC...
Page 367 - Modem Status Register.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 367 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.5.1.11 Modem Status Register This register pro...
Page 368 - register for use by the programmer.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Asynchronous Receiver Transceiver (UART) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 368 Order Number: 252480-006US 10.5.1.12 Scratch-Pad Register This read/write re...
Page 369 - that this mode is never enabled.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 369 Universal Asynchronous Receiver Transceiver (UART)—Intel ® IXP42X product line and IXC1100 control plane processors 10.5.1.13 Infrared Selection Register The Slow In...
Page 372 - Internal Bus Performance Monitoring Unit; Initializing the IBPMU
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Performance Monitoring Unit (IBPMU) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 372 Order Number: 252480-006US 11.0 Internal Bus Performance Monitoring Unit (IBPM...
Page 373 - Using the IBPMU; IBPMU Mode Selection Operation
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 373 Internal Bus Performance Monitoring Unit (IBPMU)—Intel ® IXP42X product line and IXC1100 control plane processors The most-significant bit of each three-bit programm...
Page 374 - to the Intel; Occurrence Events
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Performance Monitoring Unit (IBPMU) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 374 Order Number: 252480-006US The programmable event counters (PEC) and the previ...
Page 375 - split transfer and the first DWORD of data read is received.; Monitored Events South AHB and North AHB; Duration Events
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 375 Internal Bus Performance Monitoring Unit (IBPMU)—Intel ® IXP42X product line and IXC1100 control plane processors For a duration event, the programmable event counte...
Page 376 - North and South Modes Event Descriptions (Sheet 1 of 2)
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Performance Monitoring Unit (IBPMU) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 376 Order Number: 252480-006US Table 142. North and South Modes Event Descriptions...
Page 377 - Monitored SDRAM Events; North and South Modes Event Descriptions (Sheet 2 of 2)
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 377 Internal Bus Performance Monitoring Unit (IBPMU)—Intel ® IXP42X product line and IXC1100 control plane processors 11.2.2 Monitored SDRAM Events Selecting SDRAM mode ...
Page 378 - Internal Bus PMU Register Overview
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Performance Monitoring Unit (IBPMU) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 378 Order Number: 252480-006US 11.3 Register Descriptions 11.3.1 Event Select Regi...
Page 379 - ESR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 379 Internal Bus Performance Monitoring Unit (IBPMU)—Intel ® IXP42X product line and IXC1100 control plane processors Register ESR Bits Name Description 31:23 (Reserved)...
Page 380 - Possible Event Settings
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Performance Monitoring Unit (IBPMU) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 380 Order Number: 252480-006US Table 144. Possible Event Settings Mode [1:0] Occur...
Page 381 - set until cleared by writing a 1 to the bit.; PSR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 381 Internal Bus Performance Monitoring Unit (IBPMU)—Intel ® IXP42X product line and IXC1100 control plane processors 11.3.2 PMU Status Register (PSR) The PSR allows acc...
Page 384 - PSMR
Intel ® IXP42X product line and IXC1100 control plane processors—Internal Bus Performance Monitoring Unit (IBPMU) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 384 Order Number: 252480-006US 11.3.9 Programmable Event Counters (PEC7) 11.3.10 P...
Page 386 - Using GPIO as Inputs/Outputs
Intel ® IXP42X product line and IXC1100 control plane processors—General Purpose Input/ Output (GPIO) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 386 Order Number: 252480-006US 12.0 General Purpose Input/Output (GPIO) The Intel ® IXP42X Pro...
Page 387 - Using GPIO as Interrupt Inputs
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 387 General Purpose Input/Output (GPIO)—Intel ® IXP42X product line and IXC1100 control plane processors The General-Purpose Data Output Register is a 16-bit register wi...
Page 388 - GPIO Interrupt Selections
Intel ® IXP42X product line and IXC1100 control plane processors—General Purpose Input/ Output (GPIO) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 388 Order Number: 252480-006US • GPIT1R represents GPIO 0 through GPIO 7• GPIT2R represents GP...
Page 389 - Using GPIO 14 and GPIO 15 as Clocks; are separate for
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 389 General Purpose Input/Output (GPIO)—Intel ® IXP42X product line and IXC1100 control plane processors Once an appropriate interrupt condition is reached, the correspo...
Page 390 - GPIO Clock Frequency Select
Intel ® IXP42X product line and IXC1100 control plane processors—General Purpose Input/ Output (GPIO) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 390 Order Number: 252480-006US Table 146. GPIO Clock Frequency Select Frequency GPIO15 – Frequ...
Page 391 - after receiving a reset.; GPIO Output Register; depending upon the status of the GPOER.; GPIO Registers Overview
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 391 General Purpose Input/Output (GPIO)—Intel ® IXP42X product line and IXC1100 control plane processors † When the value of the GPIO frequency terminal count is set to ...
Page 392 - GPIO Output Enable Register; GPOUTR
Intel ® IXP42X product line and IXC1100 control plane processors—General Purpose Input/ Output (GPIO) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 392 Order Number: 252480-006US 12.4.2 GPIO Output Enable Register (GPOER) Each pin’s output tr...
Page 393 - GPIO Interrupt Status Register; masked in the Interrupt Controller block.; GP Interrupt Type Register 1; pin, as described in the following table.; GPINR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 393 General Purpose Input/Output (GPIO)—Intel ® IXP42X product line and IXC1100 control plane processors 12.4.4 GPIO Interrupt Status Register (GPISR) This register is u...
Page 394 - GPIO Interrupt Type Register 2
Intel ® IXP42X product line and IXC1100 control plane processors—General Purpose Input/ Output (GPIO) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 394 Order Number: 252480-006US 12.4.6 GPIO Interrupt Type Register 2 (GPIT2R) This register de...
Page 395 - GPIO Clock Register; MUX between the clock data and the data defined in GPOUTR.; GPCLKR
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 395 General Purpose Input/Output (GPIO)—Intel ® IXP42X product line and IXC1100 control plane processors 12.4.7 GPIO Clock Register (GPCLKR) This register controls the u...
Page 398 - Interrupt Controller; Interrupt Priority
Intel ® IXP42X product line and IXC1100 control plane processors—Interrupt Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 398 Order Number: 252480-006US 13.0 Interrupt Controller The Interrupt Controller takes as inputs 32 individua...
Page 399 - Assigning FIQ or IRQ Interrupts
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 399 Interrupt Controller—Intel ® IXP42X product line and IXC1100 control plane processors pattern to the assignments above for the first eight interrupts with the last i...
Page 400 - disable the corresponding interrupt number.; Reading Interrupt Status; the status represented on bit 31 of the Interrupt Status Register.
Intel ® IXP42X product line and IXC1100 control plane processors—Interrupt Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 400 Order Number: 252480-006US For instance, interrupt number 0 is disabled and an interrupt occurs on interru...
Page 401 - the FIQ Status Register and the IRQ Status Registers.; Interrupt Controller Register Description; Interrupt Controller Registers
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 401 Interrupt Controller—Intel ® IXP42X product line and IXC1100 control plane processors The FIQ Status Register and the IRQ Status Register are 32-bit registers that h...
Page 402 - Interrupt Status Register
Intel ® IXP42X product line and IXC1100 control plane processors—Interrupt Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 402 Order Number: 252480-006US 13.5.1 Interrupt Status Register 0xC8003014 R/W INTR_PRTY Interrupt Priority Re...
Page 404 - Interrupt-Enable Register
Intel ® IXP42X product line and IXC1100 control plane processors—Interrupt Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 404 Order Number: 252480-006US 13.5.2 Interrupt-Enable Register 13.5.3 Interrupt Select Register 13.5.4 IRQ St...
Page 405 - Interrupt Priority Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 405 Interrupt Controller—Intel ® IXP42X product line and IXC1100 control plane processors 13.5.6 Interrupt Priority Register 13.5.7 IRQ Highest-Priority Register Registe...
Page 406 - FIQ Highest-Priority Register
Intel ® IXP42X product line and IXC1100 control plane processors—Interrupt Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 406 Order Number: 252480-006US 13.5.8 FIQ Highest-Priority Register § § Register INTR_IRQ_ENC_ST Bits Name Des...
Page 409 - assume a value of all ones.; General-Purpose Timers; down counter can stop after reaching 0.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 409 Timers—Intel ® IXP42X product line and IXC1100 control plane processors The watch-dog interrupt enable bit enables and disables the interrupt that may be generated t...
Page 410 - processors’ Interrupt Controller
Intel ® IXP42X product line and IXC1100 control plane processors—Timers Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 410 Order Number: 252480-006US The general-purpose-timer, one-shot control bit will be used to select which of the preceding...
Page 411 - Timer Register Definition; General-Purpose Timer 0; Timer Registers
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 411 Timers—Intel ® IXP42X product line and IXC1100 control plane processors 14.4 Timer Register Definition 14.4.1 Time-Stamp Timer 14.4.2 General-Purpose Timer 0 Table 1...
Page 412 - General-Purpose Timer 0 Reload
Intel ® IXP42X product line and IXC1100 control plane processors—Timers Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 412 Order Number: 252480-006US 14.4.3 General-Purpose Timer 0 Reload 14.4.4 General-Purpose Timer 1 Register Name: OST_TIM0_...
Page 413 - General-Purpose Timer 1 Reload
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 413 Timers—Intel ® IXP42X product line and IXC1100 control plane processors 14.4.5 General-Purpose Timer 1 Reload 14.4.6 Watch-Dog Timer Register Name: OST_TIM1_RL Hex O...
Page 414 - Watch-Dog Enable Register
Intel ® IXP42X product line and IXC1100 control plane processors—Timers Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 414 Order Number: 252480-006US 14.4.7 Watch-Dog Enable Register 14.4.8 Watch-Dog Key Register Register Name: OST_WDOG_ENAB H...
Page 415 - Timer Status
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 415 Timers—Intel ® IXP42X product line and IXC1100 control plane processors 14.4.9 Timer Status § § Register Name: OST_STATUS Hex Offset Address: 0x C800 5020 Reset Hex ...
Page 416 - Ethernet MAC A; Processors’ Devices with Ethernet Interface
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 416 Order Number: 252480-006US 15.0 Ethernet MAC A The functionality supported by the MII Interfaces is tightly coup...
Page 417 - of the MII interfaces.; Ethernet Coprocessor; displays a block diagram of the Ethernet coprocessor.; Multiple Ethernet PHYS Connected to Processor; Ethernet Coprocessor Interface
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 417 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors One Management Data Interface is shared between the two MII interfaces. The single Ma...
Page 418 - Ethernet Coprocessor APB Interface
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 418 Order Number: 252480-006US • MII Interface• Management Data Interface 15.1.1 Ethernet Coprocessor APB Interface ...
Page 420 - Transmitting Ethernet Frames with MII Interfaces; the 256-byte Transmit FIFO contained in the Ethernet coprocessor.; MDIO Write; MDIO Read; MDC
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 420 Order Number: 252480-006US 15.1.4 Transmitting Ethernet Frames with MII Interfaces Using IXP42X product line and...
Page 421 - unpredictable behavior.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 421 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors Once the data has reached a predefined trigger point — known as the Buffer Size for T...
Page 423 - parameter specifies the Inter Frame Gap.; Receiving Ethernet Frames with MII Interfaces; Receive Engine implements the following functions:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 423 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors period will be the number of transmit clock cycles specified by the 8-bit Transmit De...
Page 425 - General Ethernet Coprocessor Configuration
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 425 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors (assuming bit 1 of Receive Control Register 1 is set to logic 1) and capture the rema...
Page 426 - plane processors becomes a recipient of that MDC clock.
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 426 Order Number: 252480-006US The physical interface clock speed will be divided by the host-side clock speed and t...
Page 427 - writeable by the Intel XScale processor via APB bus.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 427 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2 Register Descriptions The internal registers shown below are accessible via the ...
Page 428 - Transmit Control 1
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 428 Order Number: 252480-006US 15.2.1 Transmit Control 1 0xC800 90F4 Unicast Address 2 0xC800 90F8 Unicast Address 3...
Page 429 - Transmit Control 2
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 429 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.2 Transmit Control 2 15.2.3 Receive Control 1 Register Name: txcrtl2 Hex Offset ...
Page 430 - Receive Control 2; rxctrl2
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 430 Order Number: 252480-006US 15.2.4 Receive Control 2 15.2.5 Random Seed 1 Pad strip 1 = Causes the pad bytes to b...
Page 431 - Threshold For Partially Empty
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 431 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.6 Threshold For Partially Empty 15.2.7 Threshold For Partially Full 15.2.8 Buffe...
Page 432 - Transmit Deferral Parameters
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 432 Order Number: 252480-006US 15.2.9 Transmit Deferral Parameters 15.2.10 Receive Deferral Parameters Register txbu...
Page 433 - Transmit Two Part Deferral Parameters 1
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 433 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.11 Transmit Two Part Deferral Parameters 1 15.2.12 Transmit Two Part Deferral Pa...
Page 434 - MDIO Commands Registers; The detailed bit descriptions follow the four commands’ bit maps.; MDIO Command 1
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 434 Order Number: 252480-006US 15.2.14 MDIO Commands Registers Four registers make up the 32-bit MDIO Command that s...
Page 435 - MDIO Command 3; Four registers make up the 32-bit MDIO status:; MDIO Command
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 435 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.17 MDIO Command 3 15.2.18 MDIO Command 4 15.2.19 MDIO Status Registers Four regi...
Page 436 - MDIO Status 1
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 436 Order Number: 252480-006US 15.2.20 MDIO Status 1 15.2.21 MDIO Status 2 15.2.22 MDIO Status 3 15.2.23 MDIO Status...
Page 437 - Address Mask Registers; Six registers make up the 48-bit Address Mask:; Address Mask 1
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 437 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.24 Address Mask Registers Six registers make up the 48-bit Address Mask: • Addre...
Page 438 - Address Mask 2
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 438 Order Number: 252480-006US 15.2.26 Address Mask 2 15.2.27 Address Mask 3 15.2.28 Address Mask 4 15.2.29 Address ...
Page 439 - Address Mask 6; Six registers that make up the 48 bit Address Mask are:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 439 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.30 Address Mask 6 15.2.31 Address Registers Six registers that make up the 48 bi...
Page 440 - Address 1
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 440 Order Number: 252480-006US 15.2.32 Address 1 15.2.33 Address 2 15.2.34 Address 3 15.2.35 Address 4 Register Name...
Page 441 - Address 5; Six registers that make up the 48 bit Address are:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 441 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.36 Address 5 15.2.37 Address 6 Six registers that make up the 48 bit Address are...
Page 442 - Threshold for Internal Clock; Six registers that make up the 48 bit Unicast Address are:
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 442 Order Number: 252480-006US 15.2.38 Threshold for Internal Clock 15.2.39 Unicast Address Registers Six registers ...
Page 443 - Unicast Address 1
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 443 Ethernet MAC A—Intel ® IXP42X product line and IXC1100 control plane processors 15.2.40 Unicast Address 1 15.2.41 Unicast Address 2 15.2.42 Unicast Address 3 15.2.43...
Page 444 - Unicast Address 5
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC A Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 444 Order Number: 252480-006US 15.2.44 Unicast Address 5 15.2.45 Unicast Address 6 15.2.46 Core Control Register Nam...
Page 446 - Ethernet MAC B; Not all of the Intel; Processors’ with Ethernet Interface
Intel ® IXP42X product line and IXC1100 control plane processors—Ethernet MAC B Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 446 Order Number: 252480-006US 16.0 Ethernet MAC B Not all of the Intel ® IXP42X Product Line of Network Processors ...
Page 448 - High-Speed Serial Interface Receive Operation; Processors with HSS
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 448 Order Number: 252480-006US 17.0 High-Speed Serial Interfaces The functionality supported by the Hi...
Page 449 - IXP400 Software Programmer’s Guide.; High-Speed Serial Interface Transmit Operation; Interface Receive Operation” on page 448
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 449 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors These buffers also behave in a ping-pong fashion, so the NPE will read ...
Page 450 - Configuration of the High-Speed Serial Interface; Software Programmer’s Guide.
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 450 Order Number: 252480-006US The actual FIFO the byte is extracted from is dependent upon the protoc...
Page 452 - programmed to be inputs or outputs.
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 452 Order Number: 252480-006US The frame-sync signal is used to allow the HSS interface to synchronize...
Page 453 - IXP400 Software Programmer’s; Obtaining High-Speed, Serial Synchronization
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 453 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors Either an internal or external frame-sync pulse or clock can still be u...
Page 454 - HSS Registers and Clock Configuration; IXP400 Software Release. The Intel
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 454 Order Number: 252480-006US The behavior of the HSS interface is indifferent to the source of the f...
Page 455 - HSS Clock and Jitter; Table 155, “HSS Tx/Rx Clock Output” on page 455; Overview of HSS Clock Configuration; HSS Tx/Rx Clock Output
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 455 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors There is one register titled the HSS Clock Divider Register that provid...
Page 456 - HSS Tx/Rx Clock Output Frequencies and PPM Error; HSS Tx/Rx Clock Output Frequencies And Their Associated Jitter; HSS Frame Output Characterization
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 456 Order Number: 252480-006US 4.096 MHz 2 T1/E1 512 2 8.192 MHz 4 T1/E1 1,024 2 Notes: 1. These clock...
Page 457 - HSS Supported Framing Protocols; configured using the IxHssAcc API defined in the Intel; Jitter Definitions; Period; Pj
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 457 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors 17.6 HSS Supported Framing Protocols The following sections provide an ...
Page 458 - T1 Transmit Frame; T1 Receive Frame; FBit
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 458 Order Number: 252480-006US In Figure 86 , the FBit to be transmitted is stored in the HSS Transmit...
Page 459 - no frame bits in this protocol.; E1 Transmit Frame
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 459 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors • Frame sync active level (high/low).• MSb/LSb-first ordering for trans...
Page 460 - configuring HSS interface for E1 operation:; MVIP; configuring the HSS interface for MVIP:; E1 Receive Frame
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 460 Order Number: 252480-006US By using the IxHssAcc API, the following settings should be considered ...
Page 461 - the protocol is identical to the TX side of the protocol.; MVIP using 2.048Mbps Backplane
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 461 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors • Frame sync simultaneous with first data nibble - set TX frame offset ...
Page 462 - the FIFO and is therefore not sent to the NPE.; MVIP, Interleaved Mapping of a T1 Frame to an E1 Frame
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 462 Order Number: 252480-006US Every fourth timeslot received by the HSS is discarded, meaning it is n...
Page 463 - used for padding the frame due to the shorter length of the T1 frame.; MVIP, Frame Mapping a T1 Frame to an E1 Frame; MVIP, Byte Interlacing Two E1 Streams Onto a 4.096-Mbps Backplane
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 463 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors The HSS interface can be programmed to automatically ignore (lookup tab...
Page 464 - MVIP, Byte Interleaving Two T1 Streams Onto a 4.096-Mbps Backplane
Intel ® IXP42X product line and IXC1100 control plane processors—High-Speed Serial Interfaces Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 464 Order Number: 252480-006US In Figure 92 , the 'a' denotes the first E1 stream, the 'b' denotes the...
Page 465 - the E1 frames can completely fill all the timeslots available.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 465 High-Speed Serial Interfaces—Intel ® IXP42X product line and IXC1100 control plane processors Figure 94 illustrates that 4 E1 streams can be byte interleaved. The fr...
Page 468 - USB Overview
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 468 Order Number: 252480-006US 18.0 Universal Serial Bus (USB) v1.1 Device Contro...
Page 469 - Device Configuration
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 469 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors Packets are assembled into groups to produce trans...
Page 470 - USB Operation; Signalling Levels; Endpoint Configuration: Universal Serial Bus Device Controller
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 470 Order Number: 252480-006US Data flow is relative to the USB host. IN packets ...
Page 471 - decoded to represent the current state of the USB.; Bit Encoding; USB States
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 471 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors By decoding the polarity of the UDC+ and UDC- pins...
Page 472 - Field Formats; NRZI Bit Encoding Example
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 472 Order Number: 252480-006US Each time a 0 occurs, the receiver logic synchroni...
Page 473 - Endpoint field follows the Address field.; Endpoint Field Addressing
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 473 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors The host is then responsible for assigning a uniqu...
Page 474 - Packet Formats; Token Packet Type; SOF Token Packet Format
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 474 Order Number: 252480-006US 18.3.4 Packet Formats USB supports four packet typ...
Page 475 - Handshake Packet Type; Transaction Formats; Bulk Transaction Type; Data Packet Format
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 475 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors A data packet consists of a sync; a PID; from 0 to...
Page 476 - Isochronous Transaction Type; of isochronous transactions based on data direction are shown in; Control Transaction Type; DATA0 type transfers.; Bulk Transaction Formats
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 476 Order Number: 252480-006US 18.3.5.2 Isochronous Transaction Type Isochronous ...
Page 477 - uses OUT transactions.; Interrupt Transaction Type; shows the four types of interrupt transactions.; UDC Device Requests; endpoint 0 via the USB.; Interrupt Transaction Formats
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 477 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors To assemble control transfers, the host sends a co...
Page 478 - UDC Configuration; Host Device Request Summary
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 478 Order Number: 252480-006US • Number of bytes to transfer• Index or offset• Va...
Page 479 - UDC Hardware Connections
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 479 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors When the device responds to the host, it must spec...
Page 480 - bytes the USB host controller has sent to Endpoint 0.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 480 Order Number: 252480-006US A control register enables the UDC and masks the i...
Page 481 - UDC Enable; the transmit or receive serial shifter are reset.; UDC Active; the UDC is currently involved in a transaction.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 481 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.1 UDC Control Register (UDCCR) The UDC contro...
Page 487 - Bit 6 Reserved; Bit 6 is reserved for future use.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 487 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.3.7 Bit 6 Reserved Bit 6 is reserved for futu...
Page 488 - Bit 2 Reserved
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 488 Order Number: 252480-006US 18.5.4.1 Receive FIFO Service (RFS) The receive FI...
Page 490 - Bit 4 Reserved
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 490 Order Number: 252480-006US 18.5.5 UDC Endpoint 3 Control/Status Register (UDC...
Page 491 - packet is ready to transmit.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 491 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.5.8 Transmit Short Packet (TSP) Software uses...
Page 492 - Bit 3 Reserved
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 492 Order Number: 252480-006US UDCCS4[RFS] is not cleared until all data is read ...
Page 493 - register is set if transmit interrupts are enabled.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 493 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.7 UDC Endpoint 5 Control/Status Register (UDC...
Page 495 - UDC Endpoint 6 Control/Status Register
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 495 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.7.8 Transmit Short Packet (TSP) Software uses...
Page 500 - set if transmit interrupts are enabled.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 500 Order Number: 252480-006US 18.5.10 UDC Endpoint 8 Control/Status Register (UD...
Page 501 - Bit 5 is reserved for future use.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 501 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.10.6 Bit 5 Reserved Bit 5 is reserved for fut...
Page 510 - operate endpoint 13, an Isochronous IN endpoint.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 510 Order Number: 252480-006US 18.5.15 UDC Endpoint 13 Control/Status Register (U...
Page 511 - The bit’s read value is zero.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 511 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors The bit’s read value is zero. 18.5.15.4 Transmit U...
Page 513 - data in the FIFO that Intel XScale
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 513 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.16.7 Receive FIFO Not Empty (RNE) The receive...
Page 516 - generated on initial system reset.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 516 Order Number: 252480-006US 18.5.18 UDC Interrupt Control Register 0 (UICR0) T...
Page 517 - on initial system reset.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 517 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.19 UDC Interrupt Control Register 1 (UICR1) T...
Page 518 - logically ORed together to produce one interrupt request.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 518 Order Number: 252480-006US 18.5.20 UDC Status/Interrupt Register 0 (UISR0) Th...
Page 520 - The IR6 bit is cleared by writing a 1 to it.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 520 Order Number: 252480-006US 18.5.20.7 Endpoint 6 Interrupt Request (IR6) The i...
Page 522 - The IR15 bit is cleared by writing a 1 to it.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 522 Order Number: 252480-006US 18.5.21.8 Endpoint 15 Interrupt Request (IR15) The...
Page 523 - packet that is corrupted.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 523 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.22.2 Isochronous Packet Error Endpoint 4 (IPE...
Page 524 - These bits are updated every SOF.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 524 Order Number: 252480-006US 18.5.23 UDC Frame Number Low Register (UFNLR) The ...
Page 525 - input buffer is equal to the byte count +1.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 525 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.24.1 Endpoint 2 Byte Count (BC[7:0]) The byte...
Page 526 - the number of bytes that remain to be read.
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 526 Order Number: 252480-006US 18.5.26 UDC Byte Count Register 7 (UBCR7) The Byte...
Page 529 - loaded via direct Intel XScale
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 529 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.31 UDC Data Register 1 (UDDR1) Endpoint 1 is ...
Page 530 - from the Intel XScale
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 530 Order Number: 252480-006US Since it is double-buffered, up to two packets of ...
Page 531 - UDC generates an interrupt when the EOP is received.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 531 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.34 UDC Data Register 4 (UDDR4) Endpoint 4 is ...
Page 533 - can be loaded via direct Intel XScale
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 533 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.38 UDC Data Register 8 (UDDR8) Endpoint 8 is ...
Page 534 - removed from the UDC via a direct read from the Intel XScale
Intel ® IXP42X product line and IXC1100 control plane processors—Universal Serial Bus (USB) v1.1 Device Controller Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 534 Order Number: 252480-006US Because it is double-buffered, up to two packets o...
Page 535 - UDC Data Register 11
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 535 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.41 UDC Data Register 11 (UDDR11) Endpoint 11 ...
Page 537 - direct Intel XScale
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 537 Universal Serial Bus (USB) v1.1 Device Controller—Intel ® IXP42X product line and IXC1100 control plane processors 18.5.45 UDC Data Register 15 (UDDR15) Endpoint 15 ...
Page 538 - Processors’ Devices with UTOPIA
Intel ® IXP42X product line and IXC1100 control plane processors—UTOPIA Level-2 Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 538 Order Number: 252480-006US 19.0 UTOPIA Level-2 The functionality supported by the UTOPIA Level-2 interface is ti...
Page 540 - UTOPIA Transmit Module; accessible features are described in the Intel; UTOPIA Level-2 Coprocessor
Intel ® IXP42X product line and IXC1100 control plane processors—UTOPIA Level-2 Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 540 Order Number: 252480-006US 19.1 UTOPIA Transmit Module The functionality supported by the Transmit Module is tig...
Page 542 - UTOPIA Level-2 MPHY Transmit Polling
Intel ® IXP42X product line and IXC1100 control plane processors—UTOPIA Level-2 Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 542 Order Number: 252480-006US • There are eight active physical interfaces connected, named A through H, that map t...
Page 543 - UTOPIA Receive Module; IXP400 Software Programmer’s Guide
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 543 UTOPIA Level-2—Intel ® IXP42X product line and IXC1100 control plane processors In addition to supporting data transmission and HEC generation, the Transmit Module m...
Page 545 - The 32-bit counters will maintain the following counts:; UTOPIA Level-2 MPHY Receive Polling
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 545 UTOPIA Level-2—Intel ® IXP42X product line and IXC1100 control plane processors In cell-level single-PHY (SPHY) mode, the physical interface indicates that a cell is...
Page 546 - MPHY Polling Routines
Intel ® IXP42X product line and IXC1100 control plane processors—UTOPIA Level-2 Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 546 Order Number: 252480-006US 19.4 MPHY Polling Routines The UTOPIA Level-2 coprocessor implements a round-robin po...
Page 548 - JTAG Interface; TAP Controller
Intel ® IXP42X product line and IXC1100 control plane processors—JTAG Interface Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 548 Order Number: 252480-006US 20.0 JTAG Interface The JTAG signals JTG_TCK, JTG_TRST_N, and JTAG_TDI will be routed...
Page 549 - Loading the IDCODE register disables test logic.; Figure 100. TAP Controller State Diagram; RESET; *Note: State transitions occur based on the
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 549 JTAG Interface—Intel ® IXP42X product line and IXC1100 control plane processors 20.1.1 Test-Logic-Reset State In Test-Logic-Reset State, test logic is disabled to al...
Page 550 - logic operation as the result of such an error.
Intel ® IXP42X product line and IXC1100 control plane processors—JTAG Interface Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 550 Order Number: 252480-006US Test logic operation is designed such that no disturbance is caused to on-chip system...
Page 551 - this state. The instruction does not change in this state.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 551 JTAG Interface—Intel ® IXP42X product line and IXC1100 control plane processors 20.1.6 Exit1-DR State The Exit1-DR state is a temporary controller state. When the TA...
Page 552 - selected by the current instruction retain their previous state.
Intel ® IXP42X product line and IXC1100 control plane processors—JTAG Interface Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 552 Order Number: 252480-006US 20.1.10 Select-IR-Scan State The Select-IR Scan state is a temporary controller state...
Page 553 - JTAG Instructions
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 553 JTAG Interface—Intel ® IXP42X product line and IXC1100 control plane processors The instruction does not change and the instruction register retains its state. The c...
Page 554 - Data Registers
Intel ® IXP42X product line and IXC1100 control plane processors—JTAG Interface Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 554 Order Number: 252480-006US 20.3 Data Registers The Data Registers are essentially a shift register and a read/wr...
Page 555 - TAP controller enters the Shift-DR state.; Boundary Scan Register; JTAG Device Register Values
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 555 JTAG Interface—Intel ® IXP42X product line and IXC1100 control plane processors Data is received, from JTG_TDI, through a shift register and exits through JTG_TDO on...
Page 557 - registers, interrupt registers and SRAM via the AHB; Functional Description; A block diagram of the AHB Queue Manager is shown in; Figure 101. AHB Queue Manager
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 557 AHB Queue Manager (AQM)—Intel ® IXP42X product line and IXC1100 control plane processors • Provides Underflow and Overflow Status Flags for each of the queues 0-31 •...
Page 558 - AHB Interface; AHB Queue Manager Memory Map
Intel ® IXP42X product line and IXC1100 control plane processors—AHB Queue Manager (AQM) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 558 Order Number: 252480-006US returned via the AHB and for a queue write request, the data from the AHB is...
Page 559 - Queue Control; in internal SRAM. Configuration for each queue will consists of:
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 559 AHB Queue Manager (AQM)—Intel ® IXP42X product line and IXC1100 control plane processors 21.4.1 Queue Control The queues are implemented as circular buffers where ad...
Page 560 - will return zeroes in the data field on the AHB.; Queue Status; The following sections outline the queue status requirements.; Status Update
Intel ® IXP42X product line and IXC1100 control plane processors—AHB Queue Manager (AQM) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 560 Order Number: 252480-006US interface is written into SRAM at the calculated queue address. When the rea...
Page 561 - considered nearly empty.; Flag Bus; Queue Status Flags
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 561 AHB Queue Manager (AQM)—Intel ® IXP42X product line and IXC1100 control plane processors than or equal to the full watermark, the queue is considered nearly full. If...
Page 562 - Status Interrupts; register prior to computing the logical-OR.; Queue Access Word Registers 0 - 63; will perform the requested access to the queue in SRAM. See
Intel ® IXP42X product line and IXC1100 control plane processors—AHB Queue Manager (AQM) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 562 Order Number: 252480-006US bus. Following each queue access where queue status is updated, status will ...
Page 563 - which contains the status.; Queue status register for the queues 0-31.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 563 AHB Queue Manager (AQM)—Intel ® IXP42X product line and IXC1100 control plane processors 21.5.2 Queues 0-31 Status Register 0 - 3 The access to these status register...
Page 564 - Queues 32-63 Nearly Empty Status Register
Intel ® IXP42X product line and IXC1100 control plane processors—AHB Queue Manager (AQM) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 564 Order Number: 252480-006US 21.5.4 Queues 32-63 Nearly Empty Status Register The access to these status ...
Page 565 - Interrupt 0 Status Flag Source Select Register 0 – 3
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 565 AHB Queue Manager (AQM)—Intel ® IXP42X product line and IXC1100 control plane processors 21.5.6 Interrupt 0 Status Flag Source Select Register 0 – 3 The interrupt so...
Page 566 - Queue Interrupt Enable Register 0 – 1
Intel ® IXP42X product line and IXC1100 control plane processors—AHB Queue Manager (AQM) Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor DM September 2006 566 Order Number: 252480-006US 21.5.7 Queue Interrupt Enable Register 0 – 1 21.5.8 Queue Interrupt Register...
Page 567 - Word is shown in the QUECONFIG register.
Intel ® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor September 2006 DM Order Number: 252480-006US 567 AHB Queue Manager (AQM)—Intel ® IXP42X product line and IXC1100 control plane processors empty queues but until the queue configuration words have been set, this sta...
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