Intel 31244 PCI-X - Manuals

6 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Contents Tables 1 Reference Documents .................................................................................................................. 9 2 Terminology and Definition ...........................................................

Design Guide 7 Intel ® 31244 PCI-X to Serial ATA Controller Contents Revision History Date Revision # Description April 2004 003 Removed Section 5.4.5, “Spread Spectrum Clocking” on page 35. Removed SSC pin in Table 2, “Terminology and Definition” on page 9 . Updated SSCEN pin in Table 5, “Configura...

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Design Guide 9 About This Document 1 1.1 Reference Documentation For the latest revision and documentation number, contact your Intel representative. 1.2 Terminology and Definitions Table 1. Reference Documents Document Intel Document Number or Source Intel ® Artisea PCI-X to Serial ATA Controller D...

10 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller About This Document PCB Printed circuit board. Example manufacturing process consists of the following steps: • Consists of alternating layers of core and prepreg stacked • The finished PCB is heated and cured. • The via holes are drilled ...

Design Guide 11 Intel ® 31244 PCI-X to Serial ATA Controller About This Document RxData Serially encoded 10b data attached to the high-speed serial differential line receiver. 10b encoding The 8B/10B encoding scheme transmits eight bits as a 10-bit code group. This encoding is used with Gigabit Ethe...

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Design Guide 13 Intel ® 31244 PCI-X to Serial ATA Controller Overview Overview 2 This document provides layout information and guidelines for designing platform or add-in board applications with the Intel ® 31244 PCI-X to serial ATA controller (GD31244). It is recommended that this document be used ...

Design Guide 15 2.2 Applications The GD31244 may be used to build a Serial ATA Host Bus Adapter which connects to the PCI-X bus. Control for external activity LEDs, a 37.5 MHz Crystal, a voltage regulator and some external resistors and capacitors are needed. Figure 2. Quad Serial ATA Host Bus Adapt...

Design Guide 17 Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Package Intel ® 31244 PCI-X to Serial ATA Controller Package 3 The GD31244 signals, are located on a 256-pin Plastic Ball Grid Array (PBGA) p ackage to simplify signal routing and system impleme...

18 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Package 3.1 Signal Pin Descriptions The signal pin descriptions for the GD31244 are provided as a reference. A complete list is also available in the Intel ® 31244 PCI-X to Serial ATA Controller...

20 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Package P_REQ64# BIDIRECTIONAL - LVTTL: Indicates the attempt of a 64-bit transaction on the PCI bus. When the target is 64-bit capable, the target acknowledges the attempt with the assertion of...

Design Guide 21 Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Package 3.1.1 VA0, VA1 (V CCPLL ) Pin Requirements To reduce clock skew, the VA0 and VA1 balls for the Phase Lock Loop (PLL) circuit are each isolated on the package. The lowpass filter, as show...

22 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Package This page left intentionally blank. 3.2 Package/Marking Information The package is marked with three lines of text as shown in Figure 4 . (The figure is not to scale.) Figure 4. Package ...

Design Guide 23 3.3 Ball Map By Function Figure 5 shows the 544 BGA pins mapped by pin function. This diagram is helpful in placing components around the GD31244 for the layout of a PCB. To simplify routing and minimize the number of cross traces, keep this layout in mind when placing components on ...

Design Guide 25 Intel ® 31244 PCI-X to Serial ATA Controller Routing Guidelines Routing Guidelines 4 This chapter provides routing guidelines for layout and design of a printed circuit board using the GD31244. The high-speed clocking required when designing with the GD31244 requires special attentio...

26 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Routing Guidelines 4.2 Crosstalk Crosstalk is caused by capacitive and inductive coupling between signals. Crosstalk is composed of both backward and forward crosstalk components. Backward crosstalk creates an induced signal on victim netw...

Design Guide 27 Intel ® 31244 PCI-X to Serial ATA Controller Routing Guidelines 4.3 EMI Considerations It is highly recommended that good EMI design practices be followed when designing with the Intel ® 31244 PCI-X to serial ATA controller. • To minimize EMI on your PCB a useful technique is to not ...

28 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Routing Guidelines 4.4 Power Distribution and Decoupling Have ample decoupling to ground, for the power planes, to minimize the effects of the switching currents. Three types of decoupling are: the bulk, the high-frequency ceramic, and the...

Design Guide 29 4.5 Trace Impedance All signal layers require controlled impedance of 50 Ω +/- 15%, microstrip or stripline where appropriate, unless otherwise specified. Selecting the appropriate board stack-up to minimize impedance variations is very important. When calculating flight times, it is...

Design Guide 31 Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Interface Ports Intel ® 31244 PCI-X to Serial ATA Controller Interface Ports 5 5.1 Serial ROM Interface In add-in card applications, firmware may be downloaded to the system from a Serial EEPROM...

Design Guide 33 Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Interface Ports 5.4 Serial ATA Interface Four 1.5 Gbits/s Serial ATA ports are located on the GD31244, to support point-to-point connectivity to disk drives, CDROMs, DVD ROMs or any other Serial...

34 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Intel ® 31244 PCI-X to Serial ATA Controller Interface Ports 5.4.3 LED Interface Serial ATA interfaces on disk drives do not include the traditional ATA output, which drives an LED to indicate that the drive is active. The GD31244 compensa...

Design Guide 35 5.4.4 Reference Clock Generation A 37.5 MHz reference clock with a +/- 100 ppm accuracy is required for proper operation of the GD31244. This is generated from an external oscillator connected directly to the XI input. Optionally, a 37.5 MHz crystal may be connected between the XI an...

38 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology 6.1 Intel ® 31244 PCI-X to Serial ATA Controller Normal Mode (standard SATA driver) This section provides recommendations for the GD31244 running in the standard SATA mode. Figure 11 shows a standard...

Design Guide 39 Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology 6.1.1 Intel ® 31244 PCI-X to Serial ATA Controller HBA Stackup The below stackup in Figure 12 , shows the layer topology that is used in the HBA customer reference board. The first layer, Layer 0 is ...

40 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology • Jitter tolerance (TJ) must be >= 0.7 UI vs 0.62 UI of spec (@RCV pin) • Slowest edge rate assumed • Used only for GD31244 reads • Read eye was guardbanded by 10 mV to allow for crosstalk 6.2.1 B...

Design Guide 41 Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology Figure 14. Read Backplane Topology B0605-01 BP BP Package Model Intel ® 31224 MB MB SD SD a. Read Backplane Topology HDD SD SD HDD Package Model 31224 MB BP MB BP Cable b. Read Backplane with Cable T...

42 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology 6.2.2 Motherboard Stackup for Backplane Designs The motherboard is supporting components in addition to GD31244, so an assumption is, desktop PC requirements are dominate to assure the processor and ...

Design Guide 43 Figure 15. Microstrip Stackup B0424-01 + - + - 1.4 mil 1.4 mil 0.8 mil Mask Er = 3.65 5 mil 10 mil Er = 4.15 55 mil 4 mil

44 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology 6.2.3 Backplane Stripline Stackup Figure 16 provides an example stackup that may be used to implement the backplane design. The stripline shown in Figure 16 is implemented with ground flood on both c...

Design Guide 45 Intel ® 31244 PCI-X to Serial ATA Controller Printed Circuit Board (PCB) Methodology 6.2.4 Cable Interconnect With Backplane Figure 14 provides the topology which uses a cable as an interconnect between the motherboard and backplane. Table 15. Backplane Stackup, Microstrip Variable N...

Design Guide 47 Intel ® 31244 PCI-X to Serial ATA Controller PCI-X Layout Guidelines PCI-X Layout Guidelines 7 This section provides guidelines for designing with the Intel ® 31244 PCI-X to serial ATA controller PCI/PCI-X (PCI/X) bus interface in your application. This chapter is divided as follows:...

Design Guide 49 Intel ® 31244 PCI-X to Serial ATA Controller PCI-X Layout Guidelines 7.3 PCI General Layout Guidelines For acceptable signal integrity with bus speeds up to 133 MHz it is important to PCB design layout have controlled impedance. • Signal traces have an unloaded impedance of 60 +/- 10...

50 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller PCI-X Layout Guidelines 7.4 PCI-X Layout Guidelines For Slot Configurations The PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a recommends the following guidelines for the number of loads for your PCI-X designs. Any deviat...

Design Guide 51 7.4.2 PCI Clock Layout Guidelines The PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a, allows a maximum of 0.5 ns clock skew timing for each of the PCI-X frequencies: 66 MHz, 100 MHz and 133 MHz. A typical PCI-X application may require separate clock point-to-point c...

52 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller PCI-X Layout Guidelines 7.4.3 Connecting Intel ® 31244 PCI-X to Serial ATA Controller to Single-Slot Figure 17 shows one of the chipset PCI AD lines connected through W1 and W12 line segments, to a single-slot connector through W13 line se...

Design Guide 53 Intel ® 31244 PCI-X to Serial ATA Controller PCI-X Layout Guidelines 7.4.4 Embedded Intel ® 31244 PCI-X to Serial ATA Controller Single PCI-X Load Figure 18 shows GD31244 as the PCI-X agent in a standalone embedded application (with no PCI-X slot). This figure shows one of the chipse...

54 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller PCI-X Layout Guidelines 7.4.5 Embedded Intel ® 31244 PCI-X to Serial ATA Controller Design With Multiple PCI-X Loads Figure 19 shows GD31244 as the PCI-X agent 1 in a standalone embedded application (with no PCI-X slot) with other PCI-X de...

Design Guide 55 Cables and Connectors 8 8.1 Cabling A Serial ATA device is connected to a host through a direct connection or through a cable. For direct connection, the device plug connector, shown as (a) and (b) in Figure 21 , is inserted directly into a host receptacle connector, illustrated as (...

56 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Cables and Connectors For connection through a cable, the device signal plug connector, shown as (a) in Figure 21 , mates with the signal cable receptacle connector on one end of the cable, illustrated as (c) in Figure 21 . A Serial ATA po...

Design Guide 57 The signal cable receptacle connector on the other end of the cable is inserted into a host signal plug connector, shown as (f) in Figure 22 . The signal cable wire consists of two twinax sections in a common outer sheath. Besides the signal cable, there is also a separate power cabl...

58 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Cables and Connectors 8.1.1 Serial ATA Cable The Serial ATA cable consists of four conductors in two differential pairs. When necessary, the cable may also include drain wires, to be terminated to the ground pins in the Serial ATA cable re...

Design Guide 59 Intel ® 31244 PCI-X to Serial ATA Controller Voltage Power Delivery Voltage Power Delivery 9 There are two different voltages needed on the Intel ® 31244 PCI-X to serial ATA controller. These are V CC of +2.5 V ±5% and V IO of +3.3 V ±10%. Power sequencing is not required on the GD31...

Design Guide 61 Test Methodology 10 The signaling requirements of the SATA specification are measured for signal quality, Table 26 details the values from the SATA Specification, revision 1.0, 29 August 200, starting on page 76. Table 26. Interface Timing and SI Requirements Symbol Parameter Min Max...

62 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Test Methodology The SATA specification defines Figure 24 using values from Table 26 for the legal signaling levels and jitter. Several of oscilloscopes provide eye pattern masking options to allow the user to set up a mask for serial data...

Design Guide 63 10.1 Extended Voltage Mode Figure 25 , Figure 26 , Table 28 and Table 29 describe the extended voltage mode eye diagrams for the modified receiver and driver. These eye diagrams needed to be modified from the original SATA specification to allow for the higher voltage parameters requ...

64 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Test Methodology 10.1.2 Extended Voltage Mode Driver Model The extended voltage mode eye diagram for the new slow driver is shown in Figure 26 with the SATA driver mode superimposed. The extended voltage mode eye diagram for the driver is ...

Design Guide 65 Terminations: Pull-down/Pull-ups 11 This chapter provides the requirements for pull-down and pull-up terminations for the Intel ® 31244 PCI-X to serial ATA controller. The PCI-X interface pull-down/pull-up recommendation depends on the application. Table 30 details the termination of...

68 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Intel ® IQ31244 PCI-X to Serial ATA Controller Evaluation Platform Board 12.1 Features • Intel ® 80321 I/O processor based on Intel ® XScale ™ microarchitecture • 256 Mbytes DDR SDRAM in DIMM module16 Mbytes Flash ROM • Primary PCI-X bus a...

Design Guide 69 Intel ® 31244 PCI-X to Serial ATA Controller Debug Connectors and Logic Analyzer Connectivity Debug Connectors and Logic Analyzer Connectivity 13 13.1 Probing PCI-X Signals To ease the probing and debug of the PCI-X signals it is recommended to passively probe the PCI-X bus signals w...

70 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Debug Connectors and Logic Analyzer Connectivity 34 2 PERR 36 1 LOCK 38 0 STOP Table 32. Logic Analyzer Pod 2 Mictor-38 #1 Pin Number Odd Pod Logic Analyzer Channel Number PCI-X Signal Name 5 CLK/16 FRAME 7 15 DEVSEL 9 14 TRDY 11 13 C/BE2 ...

Design Guide 71 Table 33. Logic Analyzer Pod 3 Mictor-38 #2 Pin Number Odd Pod Logic Analyzer Channel Number PCI-X Signal Name 6 CLK/16 IRDY 8 15 AD15 10 14 AD14 12 13 AD13 14 12 AD12 16 11 AD11 18 10 AD10 20 9 AD09 22 8 AD08 24 7 AD07 26 6 AD06 28 5 AD05 30 4 AD04 32 3 AD03 34 2 AD02 36 1 AD01 38 0...

72 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller Debug Connectors and Logic Analyzer Connectivity Table 34. Logic Analyzer Pod 4 Mictor-38 #2 Pin Number Odd Pod Logic Analyzer Channel Number PCI-X Signal Name 5 CLK/16 UNUSED 7 15 AD31 9 14 AD30 11 13 AD29 13 12 AD28 15 11 AD27 17 10 AD26...

Design Guide 73 The recommended placement of the mictor connectors is at either end of the bus segment. The mictors are placed at the end of, as short a stub as possible, daisy chained off either end of the bus. When there is not enough room to place the mictors 0.5 inches from the target, then an a...

Design Guide 75 Design for Manufacturing 14 The Intel ® 31244 PCI-X to Serial ATA Controller is offered in a 256-pin plastic BGA. The construction of this package is shown in Figure 3 . PBGA packaging is explained extensively in the Intel ® Packaging Databook (Order Number 240800).

Design Guide 77 Intel ® 31244 PCI-X to Serial ATA Controller Thermal Solutions Thermal Solutions 15 GD31244 is packaged in a 17 mm, 256-pin Plastic Ball Grid Array (PBGA) in an industry-standard footprint. The package includes a four layer substrate with power and ground planes. The construction of ...

Design Guide 79 Intel ® 31244 PCI-X to Serial ATA Controller References References 16 16.1 Related Documents The following books and specifications may be helpful for designing with the Intel ® 31244 PCI-X to serial ATA controller. Intel documentation is available from your local Intel Sales Represe...

80 Design Guide Intel ® 31244 PCI-X to Serial ATA Controller References 16.2 Electronic Information Table 41. Electronic Information The Intel World-Wide Web (WWW) Location: http://www.intel.com Customer Support (US and Canada): 800-628-8686

Design Guide 81 Intel ® 31244 PCI-X to Serial ATA Controller Intel ® IQ31244 Controller Evaluation Platform Board Bill of Materials Intel ® IQ31244 Controller Evaluation Platform Board Bill of Materials A The bill of materials (BOM) identifies all components on the Intel ® 31244 PCI-X to Serial ATA ...