Page 2 - ADC CHANNEL MUX AND CONTROL REGISTER; PCI-DAS1200 REGISTER DESCRIPTION; WIRING CONFIGURATIONS; ANALOG CONNECTIONS; Table of Contents
23 7.3.3 TRIGGER CONTROL/STATUS REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3.2 ADC CHANNEL MUX AND CONTROL REGISTER . . . . . . . . . . . . . . . . . . . 19 7.3.1 INTERRUPT / ADC FIFO REGISTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.3 BADR1 . . . . . ....
Page 3 - ELECTRICAL SPECIFICATIONS
37 OTHER SPECIFICATIONS: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 COUNTER SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 PARALLEL DIGITAL INPUT / OUTPUT . . . . . . . . . . . . . . . . . . ....
Page 6 - INSTALLATION; Use the InstaCal shortcut if you opted to install it.
2.0 INSTALLATION The PCI-DAS1200 and PCI-DAS1200/JR boards are easy to use. This quick start procedure will help you setup,install, and test your board quickly and easily. We assume you already know how to open the PC and install expan-sion boards. If you are unfamiliar or uncomfortable with board i...
Page 8 - A dialog box “Add PCI Card?” also appears. You should choose yes.
2.2 DOS AND/OR WINDOWS 3.X Most users are now installing boards on systems with Windows 95 or higher operating systems. However, if youwish to install your PCI board in a machine running Windows 3.1 and/or DOS your BIOS will automatically detectthe board on boot-up. In this case please proceed to th...
Page 10 - HARDWARE CONNECTIONS; CONNECTOR PIN DIAGRAM
3.0 HARDWARE CONNECTIONS 3.1 CONNECTOR PIN DIAGRAM The PCI-DAS1200 and PCI-DAS1200/JR employ a 100-pin I/O connector. Please make accurate notes and paycareful attention to wire connections. In a large system, a misplaced wire may create hours of work ‘fixing’problems that do not exist. Note that pi...
Page 11 - S in g le - E n d e d I n p u t
4.0 ANALOG CONNECTIONS 4.1 ANALOG INPUTS Analog signal connection is one of the most challenging aspects of applying a data acquisition board. If you are anAnalog Electrical Engineer, this section is not for you, but if you are like most PC data acquisition users, the bestway to connect your analog ...
Page 12 - Differential Inputs; S in g le - e n d e d i n p u t w i th C o m m o n M o d e V o lt a g e; D iff e r e n t ia l In p u t
Differential Inputs Differential inputs measure the voltage between two distinct input signals. Within a certain range (referred to as thecommon mode range), the measurement is almost independent of signal source to PCI-DAS1200 ground variations.A differential input is also much more immune to EMI t...
Page 14 - WARNING
If both ac and dc readings are 0.00 volts, you may have a system with common grounds. However, since voltmeterswill average out high frequency signals, there is no guarantee. Please refer to the section below titled CommonGrounds. If you measure reasonably stable ac and dc voltages, your system has ...
Page 15 - Input Configuration
Small Common Mode VoltagesIf the voltage between the signal source ground and PCI-DAS1200 ground is small, the combination of the groundvoltage and input signal will not exceed the PCI-DAS1200’s +/-10V common mode range, (i.e., the voltage betweengrounds, added to the maximum input voltage, stays wi...
Page 18 - Is o la t e d S ig n a l S o u r c e
4.2.6 Isolated Grounds / Single-Ended InputsSingle-ended inputs can be used to monitor isolated inputs, though the use of the differential mode will increase yoursystem’s noise immunity. The diagram below shows the recommended connections in this configuration. 4.2.7 Isolated Grounds / Differential ...
Page 20 - CALIBRATION CONFIGURATION; Figure 1; PGA; ADC; Cal; Ref; Variable Gain
6.0 Self-Calibration of the PCI-DAS1200 The PCI-DAS1200 is shipped fully-calibrated from the factory with cal coefficients stored in nvRAM. When usingUniversal Library at run time, these calibration factors are loaded into system memory and are automaticallyretrieved each time a different DAC/ADC ra...
Page 21 - D A C; A n a l o g O u t; Figure 2
The calibration scheme for the Analog Out (not applicable on the PCI-DAS1200/JR) section is shown in Figure 2below. This circuit is duplicated for both DAC0 and DAC1 1 2 R e f D A C A n a l o g O u t O f f s e t A d j . T r i m D a c T r i m D a c ( c o a r s e ) T r i m D a c ( f i n e ) G a i n A ...
Page 22 - REGISTER OVERVIEW; ADC Data, FIFO Clear Registers; Operations; WRITE
7.0 PCI-DAS1200 Register Description 7.1 REGISTER OVERVIEW PCI-DAS1200 operation registers are mapped into I/O address space. Unlike ISA bus designs, this board hasseveral base addresses, each corresponding to a reserved block of addresses in I/O space. As we mention in ourprogramming chapter, we hi...
Page 23 - Source
Write operations to this register allow the user to select interrupt sources, enable interrupts, and clear interrupts as well as ADC FIFO flags. The following is a description of the Interrupt/ADC FIFO Register: INT[1:0] General Interrupt Source selection bits. AD FIFO Not Empty 1 1 AD FIFO Half Ful...
Page 24 - Status bit of ADC FIFO FULL status. This bit is latched.; These bits determine the ADC range as indicated below.; Range; Selects measurement configuration for the Analog Front-End.
EOBI Status bit ADC End-of-Burst interrupt. Only valid for ADC Burst Mode enabled. 1 = Indicates an EOB interrupt has been latched.0 = Indicates an EOB interrupt has not occurred. ADHFI Status bit of ADC FIFO Half-Full interrupt. Used during REP INSW operations. 1 = Indicates an ADC Half-Full interr...
Page 25 - UNIBIP; EOC
up to 16 channels. 0 = Analog Front-End in Differential Mode. This mode supports up to 8 channels. UNIBIP Selects offset configuration for the Analog Front-End. 1 = Analog Front-End Unipolar for selected range0 = Analog Front-End Bipolar for selected range. The following table summarizes all possibl...
Page 26 - Not Defined; Note; TGEN; This bit is used to enable External Trigger function; BURSTE
BADR1 + 4 This register provides control bits for all ADC trigger modes. A Read/Write register. WRITE TS0 TS1 - - TGEN BURSTE PRTRG XTRCL - - - ARM FFM0 C0SRC - - 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TS[1:0] These bits select one-of-two possible ADC Trigger Sources: Not Defined 1 1 External (Digita...
Page 27 - XTRIG
ARM,FFM0 These bits work in conjunction with PRTRG during FIFO'd ADC operations.Direct register level programming is beyond the scope of this manual, and should be attempted only by extremely experienced register level programmers. Call Technical Support for further information. The table below prov...
Page 28 - This bit enables the 8-bit trim DACs for the following circuits:
7.3.4 CALIBRATION REGISTER As mentioned before, direct register level programming should be attempted only by extremely experienced registerlevel programmers. This is true for register-level calibration. If you’re not sure, don’t attempt it. Call TechnicalSupport for more information. BADR1 + 6 This...
Page 29 - DACEN; LSB Size
CALEN This bit is used to enable Cal Mode. 1 = Selected Cal Source, CSRC[2:0], is fed into Analog Channel 0.0 = Analog Channel 0 functions as normal input. SDI Serial Data In. This bit is used to set serial address/data stream for the DAC8800 TrimDac and 7376 digital potentiometer. Used in conjuncti...
Page 31 - Function; All reads/writes to BADR3 are byte operations.; ADC PACER CLOCK DATA AND CONTROL REGISTERS; 254A COUNTER 0 DATA - ADC POST TRIGGER CONVERSION COUNTER
7.5 BADR3 The I/O Region defined by BADR3 contains data and control registers for the ADC Pacer, Pre/Post-Trigger Count-ers, User Counters and Digital I/O bytes. The PCI-DAS1200 has two 8254 counter/timer devices. These arereferred to as 8254A and 8254B and are assigned asshown below: User Counter #...
Page 32 - 254A COUNTER 2 DATA - ADC PACER DIVIDER UPPER; WRITE ONLY
8254A COUNTER 2 DATA - ADC PACER DIVIDER UPPER BASE + 2 READ/WRITE D0 D1 D2 D3 D4 D5 D6 D7 0 1 3 2 4 5 6 7 Counter 1 provides the lower 16 bits of the 32-bit pacer clock divider. Its output is fed to the clock input of Counter2 which provides the upper 16-bits of the pacer clock divider. The clock i...
Page 34 - INDEX and USER COUNTER DATA AND CONTROL REGISTERS
IN IN IN IN 1 1 1 1 OUT IN IN IN 0 1 1 1 IN OUT IN IN 1 0 1 1 OUT OUT IN IN 0 0 1 1 IN IN OUT IN 1 1 0 1 OUT IN OUT IN 0 1 0 1 IN OUT OUT IN 1 0 0 1 OUT OUT OUT IN 0 0 0 1 IN IN IN OUT 1 1 1 0 OUT IN IN OUT 0 1 1 0 IN OUT IN OUT 1 0 1 0 OUT OUT IN OUT 0 0 1 0 IN IN OUT OUT 1 1 0 0 OUT IN OUT OUT 0 1...
Page 37 - Electrical Specifications
8.0 Electrical Specifications (Typical specifications for 25 Deg C unless otherwise specified.) ANALOG INPUT SECTION Resolution 12 bits Programmable ranges ±10 V, ±5 V, ±2.5 V, ±1.25 V, 0 to 10 V, 0 - 5 V, 0 to 2.5 V, 0 to 1.25V A/D pacing Programmable: internal counter or external source (A/D Exter...
Page 40 - OTHER SPECIFICATIONS:; Power consumption; Operating temperature range
OTHER SPECIFICATIONS: Power consumption Icc: Operating (A/D converting to FIFO) 0.8 A typical, 1.0 A max Environmental Operating temperature range 0 to 70 °C Storage temperature range -40 to 100 °C Humidity 0 to 90% noncondensing 37
Page 41 - — FOR YOUR NOTES —
Page 42 - EC Declaration of Conformity; Description
EC Declaration of Conformity Description Part Number High speed analog I/O board for the PCI busHigh speed analog input board for the PCI bus PCI-DAS1200PCI-DAS1200/JR to which this declaration relates, meets the essential requirements, is in conformity with, and CE marking has beenapplied according...
