Intel ZT 7102 - Manual

Intel ZT 7102

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Table of Contents:

  • Page 3 – Contents
  • Page 9 – Figures
  • Page 10 – Tables
  • Page 12 – Revision History
  • Page 13 – Overview
  • Page 14 – Figure 1. Functional Block Diagram
  • Page 15 – Terms Used in This Document
  • Page 17 – Hardware Specifications
  • Page 18 – System Architecture; Slot Connections; Figure 2. System Management Architecture
  • Page 19 – Chassis Sensor Connections; Power Modules
  • Page 20 – Face Plate; Figure 3. Face Plate
  • Page 21 – Faceplate Features; Table 2. Faceplate Features
  • Page 22 – Mechanical; Board Dimensions and Weight; PCB Dimensions; Connectors; Table 3. Board Dimensions and Weight
  • Page 23 – Figure 5. Connector Locations
  • Page 24 – J1 Backplane Connector; J2 Backplane Connector; Table 5. J1 Connector Pinout
  • Page 25 – J3 Backplane Connector; Table 6. J2 Connector Pinout
  • Page 26 – Backplane Pin Descriptions; Table 8. Pin Type Definitions
  • Page 27 – JA1 Ethernet Port
  • Page 28 – J6 Serial Port; J7 Telco Alarm Connector; Table 10. JA1 Ethernet Port Pinout; Table 11. J6 Serial Port Pinout
  • Page 29 – Electrical and Environmental; CMM Power; Table 12. J7 Telco Alarm Connector Pinout; Table 13. CMM Power Availability
  • Page 30 – Power Ramp Circuitry; Operating Temperature; Table 14. Absolute Maximum Ratings
  • Page 31 – DC Operating Characteristics; Onboard Switches; Table 15. DC Operating Characteristics; Table 16. Switch Cross Reference Table; Figure 7. Default Switch Configuration
  • Page 32 – Switch Descriptions; Processor and Chipset
  • Page 33 – Memory; Removing the SODIMM; Installing Memory; Flash; Dual Ethernet Controllers
  • Page 34 – Telco Alarm Signal; Alarm Relays; Real Time Clock; Network Time Synchronization
  • Page 35 – Watchdog Timer; Replacing the Battery; Table 18. Battery Characteristics
  • Page 36 – Running Your System Without A CMM
  • Page 37 – Operating System; Ethernet Interfaces
  • Page 38 – CMM SEL Architecture
  • Page 39 – Hardware Redundancy Specification
  • Page 40 – Synchronization Requirements; Table 19. CMM Synchronization
  • Page 41 – CMM Failover; Scenarios That Force a Failover; Scenarios That Failover to a Healthier Standby CMM
  • Page 42 – Scenarios That Failover to an Equally Healthy CMM; Failover Timing
  • Page 43 – CMM Installation and Removal; Unpacking; Connectivity; Installing the CMM
  • Page 44 – Removing the CMM; Figure 8. Ejector Handle Operation
  • Page 47 – BIST Test Flow; Figure 9. BIST Flow Chart
  • Page 48 – Table 20. BIST Implementation
  • Page 49 – Event Log Area and Event Management; Figure 10. Timing of BIST Stages
  • Page 50 – OS Flash Corruption Detection and Recovery Design; Monitoring the Static Images
  • Page 51 – BIST Test Descriptions; Flash Checksum Test
  • Page 52 – FPGA Version Check
  • Page 53 – CLI Overview; Connecting through a Console
  • Page 54 – FTP Into the CMM; Initial Setup - Logging in for the First Time; Setting IP Address Properties
  • Page 55 – Setting Eth0 to DHCP
  • Page 56 – Setting a Hostname; Setting Auto-Logout Time Limit; Rebooting the CMM
  • Page 57 – cmmget and cmmset syntax
  • Page 61 – Sample CLI Operations
  • Page 62 – Generating a System Status Report
  • Page 63 – Resetting the Password; Resetting the Password in a Single CMM System
  • Page 65 – Sensor Types; Threshold-Based Sensors; Threshold-Based Sensor Events; Discrete Sensors; Discrete Sensor Events
  • Page 67 – Health Event Strings; Syntax of Health Event Strings; “healthevents” Query Event Syntax; SEL Event Syntax
  • Page 68 – SNMP Trap Event Syntax; Sensor Targets; Table 28. CMM Sensor Targets
  • Page 69 – Healthevents Queries; HealthEvents Queries for Individual Sensors; No Active Events
  • Page 70 – Not Present or Non-IPMI Locations; List of Possible Health Event Strings
  • Page 71 – All Locations
  • Page 72 – CMM Location
  • Page 73 – Chassis Location
  • Page 75 – Table 40. Chassis Sensor Event Strings
  • Page 77 – Slot Power-Up Sequence; System Master Boards
  • Page 78 – Fabric and PCI-Less Slots; Obtaining the Power State of a Board
  • Page 79 – Controlling the Power State of a Slot; Powering Off a Board; Powering On a Board; Resetting a Board; Power Sequencing Commands and Policies
  • Page 80 – Retrieving the Maximum Power-Up Attempts
  • Page 81 – Power Sequencing SEL Events
  • Page 83 – Power Supplies; Power Supply Detection
  • Page 84 – Inhibiting Power Supplies; Enabling Power Supplies
  • Page 85 – Drone Mode SBC Support; Adding a Drone Mode Capable SBC
  • Page 87 – Active vs. Offline Slots; Determining the State of a Slot; Setting a Slot to Offline Mode; Setting a Slot to Active Mode; Limitations of the Offline Mode
  • Page 89 – FRU Information
  • Page 90 – Chassis FRU Validity Check
  • Page 91 – Fan Control and Monitoring; Setting Fan Speed; Considerations for Turning Off the Fans; Automatic Fan Control
  • Page 92 – Querying Fan Tray Sensors
  • Page 93 – CMM Scripting; CLI Scripting; Script Synchronization; Associating Scripts to Event Severity
  • Page 94 – Listing Scripts Associated With Events; Removing Scripts From an Associated Event; Setting Scripts for Specific Individual Events; Event Codes
  • Page 95 – Setting Event Scripts
  • Page 97 – SNMP
  • Page 98 – CMM MIB; CMM MIB Objects; SNMP Agent
  • Page 99 – Configuring the SNMP Agent Port; Configuring the Agent to Respond to SNMP v3 Requests
  • Page 100 – SNMP Trap Utility; Configuring the SNMP Trap Port; Configuring the CMM to Send SNMP v3 Traps; Configuring the CMM to Send SNMP v1 Traps; Configuring and Enabling SNMP Trap Addresses; Configuring an SNMP Trap Address; Enabling and Disabling SNMP Traps
  • Page 101 – Alerts Using SNMPv3; Security Model; SNMPv3 Security: Authentication Protocol and Privacy Protocol; Table 44. SNMPv3 Security Fields
  • Page 103 – RPC; Setting Up the RPC Interface
  • Page 106 – Table 45. Error and Return Codes for the RPC Interface (Sheet 1 of 4)
  • Page 107 – Table 45. Error and Return Codes for the RPC Interface (Sheet 2 of 4)
  • Page 108 – Table 45. Error and Return Codes for the RPC Interface (Sheet 3 of 4)
  • Page 109 – ChassisManagementApi() Threshold Response Format; Table 45. Error and Return Codes for the RPC Interface (Sheet 4 of 4)
  • Page 110 – ChassisManagementApi() String Response Format; Table 46. Threshold Response Formats
  • Page 113 – ChassisManagementApi() Integer Response Format
  • Page 114 – FRU String Response Format; Table 49. FRU Data Items String Response Format (Sheet 1 of 2)
  • Page 115 – RPC Sample Code; Table 49. FRU Data Items String Response Format (Sheet 2 of 2)
  • Page 121 – Telco Alarm Sensors; Configuring the Telco Alarm Connector Pins; Telco Alarm Connector Sensor Naming
  • Page 122 – Sensor Names using SNMP; Telco Alarm Sensors and Redundancy
  • Page 123 – Application Hosting; System Details; Startup and Shutdown Scripts; File System Storage Constraints
  • Page 124 – RAM-Disk Storage Locations; Ram Disk Directory Structure
  • Page 125 – Busless Backplane Support
  • Page 127 – Updating Software; Key Features of the Firmware Update Process
  • Page 128 – Critical Software Update Files and Directories; Table 51. List of Critical Software Update Files and Directories
  • Page 129 – Update Package File Validation
  • Page 130 – Component Versioning; saveList and Data Preservation; Table 53. saveList Items and Their Priorities (Sheet 1 of 2)
  • Page 131 – Update Mode; Table 53. saveList Items and Their Priorities (Sheet 2 of 2)
  • Page 132 – Synchronization; Updating to a Newer Synchronization Version; Synchronization Behavior for Differing Synch Versions
  • Page 133 – Updating to the Same Synchronization Version; Single CMM System
  • Page 134 – Hooks for User Scripts; Update Mode User Scripts; Data Restore User Scripts.
  • Page 136 – Update Process
  • Page 137 – Update Process Status and Logging
  • Page 138 – RedBoot Update Process; Update Procedure
  • Page 139 – Appendix D Example CLI Commands
  • Page 141 – Appendix E Datasheet Reference
  • Page 143 – Appendix F Warranty Information; For the Americas
  • Page 144 – For EMEA
  • Page 147 – Appendix G Customer Support; Technical Support and Return for Service Assistance
  • Page 149 – Appendix H Agency Approvals; CE Certification
  • Page 150 – Regulatory Information; Product Safety Information; Safety Precautions
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Intel

®

NetStructure™ ZT 7102

Chassis Management Module

Technical Product Specification

August 2004

Order Number: 273770-017

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Summary

Page 3 - Contents

Technical Product Specification 3 Intel ® NetStructure™ ZT 7102 Chassis Management Module Contents Contents 1.0 Introduction ...................................................................................................................................... 13 1.1 Overview ...........................

Page 9 - Figures

Technical Product Specification 9 Intel ® NetStructure™ ZT 7102 Chassis Management Module Contents 25.12.2 Data Restore User Scripts. .................................................................................. 13425.12.3 Example Task - Replace /home/scripts/myScript with a newer version if up...

Page 10 - Tables

10 Technical Product Specification Intel ® NetStructure™ ZT 7102 Chassis Management Module Contents 9 BIST Flow Chart ......................................................................................................................... 47 10 Timing of BIST Stages ...................................

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