Intel SE7501WV2 - Manual

Intel SE7501WV2

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Table of Contents:

  • Page 2 – Revision History; Disclaimers; The Intel
  • Page 3 – iii; Table of Contents; Intel
  • Page 4 – Revision
  • Page 7 – vii
  • Page 9 – ix
  • Page 11 – xi; Ministry of Economic Development (New Zealand) Declaration of
  • Page 12 – List of Figures
  • Page 13 – xiii; List of Tables
  • Page 15 – xv
  • Page 16 – Server Board SE7501WV2 Dynamic Power Supply Voltage
  • Page 17 – Chapter 9
  • Page 19 – Flash ROM device for system BIOS: Intel
  • Page 20 – Server Board SE7501WV2 Block Diagram
  • Page 21 – Architecture; Processor and Memory Subsystem; Support; The SE7501WV2 server board supports one or two Intel; Server Board SE7501WV2 Processor Support Matrix for 533MHz
  • Page 22 – Server Board SE7501WV2 Processor Support Matrix for 400MHz; Processor module presence detection logic; VRM
  • Page 23 – Reset Configuration Logic; or jumpers when using production level processors.; Processor Module Presence Detection; Subsystem
  • Page 24 – Figure 2. Memory Sub-system Block Diagram; Memory DIMM Support; The maximum memory capacity is 12 GB.; Configuration
  • Page 25 – DIMM and memory configurations must adhere to the following:; Table 3. Memory Bank Labels
  • Page 26 – Figure 3. Memory Bank Label Definition; An I; DIMM Failure LED
  • Page 27 – Intel® Single Device Data Correction feature
  • Page 28 – MCH Memory Architecture; Configurations; MCH North Bridge
  • Page 29 – The P64-B supports the following embedded devices and connectors:; P64-C supports the following embedded devices and connectors:
  • Page 30 – PCI bus interface
  • Page 31 – APIC and 8259 interrupt controller; PCI Bus Master IDE Interface
  • Page 32 – Management; GPIOs
  • Page 33 – Ports
  • Page 34 – Serial Port A; Serial Port B; The following figure shows the serial port mux functionality.
  • Page 35 – Figure 4. Serial Port Mux Logic; Rear RJ45 Serial B Port
  • Page 36 – Figure 5. J5A2 Jumper Block for DCD Signal; Pin 1 – DCD to Pin #7
  • Page 37 – Floppy Disk Controller; Using both interfaces in a common configuration is not supported.; Keyboard and Mouse; Flash; The SE7501WV2 server board incorporates an Intel
  • Page 38 – Configuration and Initialization; Memory; PCI Memory Space; An Intel; Shadowing
  • Page 39 – System Management Mode Handling; Map; Register
  • Page 40 – Number; Table 9. PCIdevice IDs; Device
  • Page 41 – Initialization; sized and initialized.; Clock Generation and Distribution; Clock
  • Page 43 – Server Board SE7501WV2 Clock Distribution
  • Page 44 – PCI Local Bus Specification; Table 10. PCI Bus Segment Characteristics; Arbitration; The
  • Page 45 – The following table defines the arbitration connections.; 2546EB dual channel Gigabit Ethernet controller.
  • Page 46 – Zero Channel RAID (ZCR) Capable Riser Slot
  • Page 47 – SCSI; Boot array support
  • Page 48 – Controller; Modes
  • Page 49 – Table 17. Video Modes; Video Memory Interface; Table 18. Video Memory Interface
  • Page 50 – Front Panel Video Memory; mm; NIC Connector and Status LEDs; Interrupt Routing
  • Page 51 – Legacy Interrupt Routing; Legacy Interrupt Sources; Table 19. Interrupt Definitions; Serialized IRQ Support
  • Page 52 – Server Board SE7501WV2 Interrupt Mapping
  • Page 54 – Server Board SE7501WV2 Sahalee BMC Block Diagram
  • Page 55 – Table 21. BMC Pinout
  • Page 61 – Fault Resilient Booting
  • Page 62 – System Reset Control; Reset
  • Page 63 – C Bus Specification
  • Page 64 – Reporting; Error Sources and Types; PCI bus errors; PCI Bus Errors
  • Page 65 – Table 24. System Status LEDs
  • Page 66 – Critical Condition; Non-Critical Condition; Set Fault Indication; Degraded Condition
  • Page 67 – POST Code Diagnostic LEDs; Table 25. Boot Block POST Progress Codes
  • Page 70 – Sensors
  • Page 71 – The BIOS is implemented as firmware that resides in the flash ROM; System Flash ROM Layout; The BIOS conforms to the
  • Page 74 – Set DIMM State
  • Page 75 – Allocation
  • Page 76 – API; Legacy ISA add-in devices are not supported.; Automatic Detection of Video Adapters; The BIOS detects video adapters in the following order:
  • Page 77 – Boot without Keyboard and/or Mouse; Table 26. Allowed Combinations of Floppy Drive and Floppy Media
  • Page 78 – BIOS Supported Server Management Features
  • Page 79 – There are three runtime components to ACPI:
  • Page 80 – Events; Table 27. Supported Wake Events; Front Panel Switches; Power Switch Off to On
  • Page 82 – PXE BIOS Support; Requirements; PXE-compliant BIOS implementations must; Recommendations; POST Memory Manager Specification; Console Redirection
  • Page 83 – Mappings
  • Page 86 – Table 29. ASCII Key Mappings
  • Page 87 – Emergency Management; is also recognized by Intel BIOS and BMC.; Service Partition Boot
  • Page 89 – Table 30. SMBIOS Header Structure
  • Page 90 – The SE7501WV2 server board is compliant with the
  • Page 91 – Boot; splash screen with a custom one.; BIOS Serviceabilty Features
  • Page 92 – Flash Update Utility; The Setup utility
  • Page 93 – Loading the System BIOS; Loading the; BIOS Recovery Mode; Performing BIOS Recovery
  • Page 94 – Rolling BIOS and On-line updates
  • Page 95 – BIOS and System Setup; BIOS Setup Utility; Embedded SCSI
  • Page 96 – Setup Utility Operation
  • Page 97 – Table 31. Setup Utility Screen; Entering the BIOS Setup Utility; Table 32. Keyboard Command Bar
  • Page 98 – Menu Selection Bar
  • Page 99 – Main Menu Selections; Table 33. Main Menu Selections
  • Page 100 – Table 34. Primary Master and Slave Adapters Sub-menu Selections; Advanced Menu Selections
  • Page 103 – Table 41. Memory Configuration Menu Selections; Security Menu Selections; Table 42. Security Menu Selections
  • Page 104 – Server Menu Selections; Table 43. Server Menu Selections
  • Page 105 – Table 44. System Management Sub-menu Selections
  • Page 106 – Table 45. Serial Console Redirection Sub-menu Selections
  • Page 107 – Table 47. Fault Resilient Boot Sub-menu Selections; Boot Menu Selections; Table 48. Boot Menu Selections
  • Page 108 – Table 50. Hard Drive Selections; Exit Menu Selections; Table 52. Exit Menu Selections
  • Page 109 – BIOS Security Features; Model; Table 53. Security Features Operating Model
  • Page 110 – Password Protection
  • Page 111 – Inactivity Timer; Floppy drive is write protected (if selected in setup); Hot Key Activation
  • Page 112 – PCI bus
  • Page 113 – Processor Bus Error
  • Page 114 – System Limit Error; Server Management External Architecture Specification
  • Page 115 – Disable on FRB2
  • Page 116 – Boot Monitoring
  • Page 117 – Figure 10. BIOS Boot Monitoring Flowchart
  • Page 118 – Logging Format Conventions; The BIOS complies with Version 1.5 of the; Memory Error Events; event against
  • Page 119 – Table 54. Memory Error Event Data Field Contents
  • Page 120 – PCI Error Events; Table 55. PCI Error Event Data Field Contents
  • Page 122 – Table 58. Examples of Event Data Field Contents for FRB-2 Errors; POST Progress Code LEDs
  • Page 123 – POST Error Codes and Messages; Table 60. Standard POST Error Messages and Codes
  • Page 124 – Table 61. Extended POST Error Messages and Codes
  • Page 125 – Table 62. BIOS Recovery Beep Codes
  • Page 126 – Bootblock Error Beep Codes; Table 63. Bootblock Error Beep Codes
  • Page 127 – Table 65. Interrupt 15h Extensions; Services
  • Page 128 – Intel ID String
  • Page 129 – Information
  • Page 130 – Multi-Processor Specification
  • Page 131 – Multiple Processor Support
  • Page 132 – Micro-architecture BIOS Writer’s Guide; OEM Customization
  • Page 133 – This token has the following format:; MSB
  • Page 134 – Scan Point Definitions; Table 66. User Binary Area Scan Point Definitions
  • Page 135 – Format of the User Binary Information Structure; Table 67. User Binary Information Structure; OEM Splash Screen
  • Page 136 – ACPI; S0 Sleep State; Power button/ sleep button
  • Page 138 – Table 68. Supported Wake Events
  • Page 139 – Connectors
  • Page 140 – Memory Module Connector; DIMM Specification
  • Page 141 – Socket; Table 73. Socket 604 Processor Socket Pinout
  • Page 143 – System Management Headers; Header
  • Page 146 – Front Panel Connectors; Table 78. 34-pin Front Panel Connector Signal Descriptions
  • Page 149 – Connector
  • Page 151 – ATA RAID Connectors
  • Page 153 – Using both connectors in a common system is not supported.
  • Page 154 – Serial Port Connector; Two serial ports are provided on the server board.; Keyboard and Mouse Connector
  • Page 155 – Headers
  • Page 156 – Jumpers; System Recovery and Update Jumpers; Server Board SE7501WV2 Configuration Jumpers (J1D4)
  • Page 157 – External RJ45 Serial Port Jumper Block
  • Page 158 – General Specifications; Absolute Maximum Ratings; baseboard; Table 95. Absolute Maximum Ratings; Power Information; SE7501WV2 Server Board Power Budget
  • Page 159 – Power Supply Specifications; Timing; ) of each other and begin to turn off within 400 ms (T
  • Page 162 – Recovery
  • Page 163 – Regulatory and Integration Information; Product Regulatory Compliance; Product Safety Compliance
  • Page 164 – Electromagnetic Compatibility Notices; Replacing the Back up Battery; WARNING
  • Page 165 – ADVARSEL
  • Page 166 – Mechanical Specifications; Server Board SE7501WV2 Mechanical Drawing
  • Page 167 – PCI Riser Cards; Figure 15. 1-Slot PCI Riser Mechanical Drawing
  • Page 168 – Appendix A: Glossary
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Intel

®

Server Board

SE7501WV2

Technical Product Specification

Intel reference number C25653-001

Revision 1.0

December 2002

Enterprise Platforms and Services Division

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Summary

Page 2 - Revision History; Disclaimers; The Intel

Revision History Intel® Server Board SE7501WV2 TPS Revision 1.0 Intel reference number C25653-001 ii Revision History Date Revision Number Modifications 11/02 0.5 First draft for internal review based on the SE7500WV2 TPS 12/02 1.0 Production Release Disclaimers Information in this document is provi...

Page 3 - iii; Table of Contents; Intel

Intel® Server Board SE7501WV2 TPS Table of Contents Revision 1.0 Intel reference number C25653-001 iii Table of Contents 1. Introduction ..........................................................................................................17 2. SE7501WV2 Server Board Overview ......................

Page 4 - Revision

Table of Contents Intel® Server Board SE7501WV2 TPS Revision 1.0 Intel reference number C25653-001 iv 4.4 Hardware Initialization................................................................................ 41 4.5 Clock Generation and Distribution ....................................................

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