Page 3 - Contents; Introduction; Getting Started; Intel
Document Number: 274069-001US September, 2004 3 Intel ® IQ80332 I/O Processor Evaluation Platform Board Manual Contents Contents 1 Introduction .................................................................................................................................... 9 1.1 Document Purpose ...
Page 4 - Software Reference
4 September, 2004 Document Number: 274069-001US Intel ® IQ80332 I/O Processor Evaluation Platform Board Manual Contents 3.7.1 Console Serial Port................................................................................................ 35 3.7.2 JTAG Debug .........................................
Page 5 - Getting Started and Debugger
Document Number: 274069-001US September, 2004 5 Intel ® IQ80332 I/O Processor Evaluation Platform Board Manual Contents B Getting Started and Debugger ................................................................................................... 53 B.1 Introduction ................................
Page 6 - Figures
6 September, 2004 Document Number: 274069-001US Intel ® IQ80332 I/O Processor Evaluation Platform Board Manual Contents Figures 1 Intel ® 80332 I/O Processor Block Diagram ................................................................................ 13 2 Serial-UART Communication ...................
Page 7 - Examples
Document Number: 274069-001US September, 2004 7 Intel ® IQ80332 I/O Processor Evaluation Platform Board Manual Contents Examples 1 Intel ® 80332 I/O Processor Related Documentation List.............................................................. 9 2 Electronic Information ............................
Page 8 - Revision History
8 September, 2004 Document Number: 274069-001US Intel ® IQ80332 I/O Processor Evaluation Platform Board Manual Contents Revision History Date Revision Description 27 September 2004 001 Initial Release.
Page 9 - Document Purpose and Scope; This document describes the Intel; Other Related Documents; To obtain Intel literature write to or call:
Evaluation Platform Board Manual 9 Introduction 1 1.1 Document Purpose and Scope This document describes the Intel ® IQ80332 I/O processor evaluation platform board (IQ80332) using DDR-II 400 MHz SDRAM. The Intel ® 80332 I/O processor (80332) is intended for rapid, intelligent I/O development. The 8...
Page 10 - Table 3; Electronic Information; Component Reference
10 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Introduction 1.3 Electronic Information 1.4 Component References Table 3 provides additional information on the major components of 80332. Table 2. Electronic Information Support Type Location/Contact The Intel World-Wide Web (WWW) Lo...
Page 11 - Terms and Definitions
Evaluation Platform Board Manual 11 Intel ® IQ80332 I/O Processor Introduction 1.5 Terms and Definitions Table 4. Terms and Definitions Acronym/Term Definition ARM Refers to both the microprocessor architecture and the company that licenses it. CRB Customer Reference Board ICE In-Circuit Emulator – ...
Page 12 - x8 PCI Express Upstream Link.
12 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Introduction 1.6 Intel ® 80332 I/O Processor About the 80332. The 80332 is a multi-function device that combines the Intel XScale® core with intelligent peripherals, and integrates two PCI Express-to-PCI Bridges. The 80332 consolidate...
Page 14 - Summary of Features
14 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Introduction 1.7 Intel ® IQ80332 I/O Processor Evaluation Platform Board Features Table 5. Summary of Features Feature Definition Battery Backup Unit: Battery back up circuit for SDRAM. Ethernet Intel(R) 82545EM Gigabit Ethernet Contr...
Page 15 - Kit Content; Kit contains the following items:; Hardware Installation; First-Time Installation and Test
Evaluation Platform Board Manual 15 Getting Started 2 The 80332 is a software development environment for IQ80332. Software updates and additional offerings from vendors can change frequently. To keep up-to-date, please visit http://www.intel-ioprocessortools.com/kshowcase/view for the latest update...
Page 16 - Power Requirements; The 80332 has an auxiliary power receptacle (J1A1, see
16 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started 2.2.2 Power Requirements The 80332 requires a 3.3 V supply coming through the PCI Express primary connector. Plug the board into a desktop with a PCI Express slot. The 80332 has an auxiliary power receptacle (J1A1, see...
Page 17 - Factory Settings; “Switches and Jumpers” on page 38; Development Strategy; Supported Tool Buckets; ARM RealView Developer Suite; Contents of the Flash
Evaluation Platform Board Manual 17 Intel ® IQ80332 I/O Processor Getting Started 2.3 Factory Settings Make sure that the switch/jumper settings are set to proper positions as explained in Section 3.9, “Switches and Jumpers” on page 38 . 2.4 Development Strategy 2.4.1 Supported Tool Buckets For deve...
Page 18 - Target Monitors; RedHat RedBoot; Here are some highlights of RedBoot capabilities:
18 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started 2.5 Target Monitors 2.5.1 RedHat RedBoot RedBoot* is an acronym for “RedHat Embedded Debug and Bootstrap”, and is the standard embedded system debug/bootstrap environment from RedHat, replacing the previous generation ...
Page 19 - Host Communications Examples; How to communicate to the host.; Using a serial connection to communicate with the board (; JTAG Debug Communication; Serial-UART Communication; JTAG Debug Communication
Evaluation Platform Board Manual 19 Intel ® IQ80332 I/O Processor Getting Started 2.6 Host Communications Examples How to communicate to the host. 2.6.1 Serial-UART Communication Using a serial connection to communicate with the board ( Figure 2 ). Please note that the evlaution board is plugged int...
Page 20 - Network Communication; Network Communication Example
20 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started 2.6.3 Network Communication Using a standard network connection, the user can communicate with the board via the ethernet port. Redboot also allows the user to remotely boot the platform using a BOOTP server through th...
Page 21 - Communicating with RedBoot
Evaluation Platform Board Manual 21 Intel ® IQ80332 I/O Processor Getting Started 2.6.4 GNUPro GDB/Insight 2.6.4.1 Communicating with RedBoot Hardware Setup: • Host with UNIX/Linux or Win32 installed • IQ80332 with serial cable • RedHat RedBoot monitor Flashed to the platform board Recommended Mappi...
Page 23 - Connecting with GDB
Evaluation Platform Board Manual 23 Intel ® IQ80332 I/O Processor Getting Started 2.6.4.2 Connecting with GDB Below are the GDB commands entered from the command prompt. Be sure system path is set to access “xscale-elf-gdb.exe”. File name in example “hello”. Bold type represents input by user: >x...
Page 24 - This Page Left Intentionally Blank
24 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started This Page Left Intentionally Blank
Page 25 - Hardware Reference Section; Functional Diagram; Figure 5; Functional Block Diagram; Intel®
Evaluation Platform Board Manual 25 Intel ® IQ80332 I/O Processor Hardware Reference Section Hardware Reference Section 3 3.1 Functional Diagram Figure 5 shows the functional block for the 80332. Figure 5. Functional Block Diagram DDR II 400 GPIOs DDR SDRAM Battery Backup 8 MB St rataFLASH JTAG Slot...
Page 26 - Board Form Factor
26 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.2 Board Form-Factor/Connectivity Table 6 summarizes the form-factor and connectivity features for the 80332. Table 6. Form-Factor/Connectivity Features Description The IQ80332 is a x8 PCI Express card with...
Page 27 - Power; Table 7; Power Features
Evaluation Platform Board Manual 27 3.3 Power The 80332 draws power from the PCI Express bus. The power requirements for the 80332 are shown in Table 7 below. The numbers do not include the power required by a PCI-X card mounted on the expansion slot. Note: The maximum current was calculated, but no...
Page 28 - Memory Subsystem; DDR SDRAM; Battery Backup; Status” on page 34
28 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.4 Memory Subsystem The Memory Controller of 80332 controls the DDR SDRAM memory subsystem. It features pro-grammable chip selects and support for error correction codes (ECC). The memory controller can be ...
Page 29 - Total Flash memory size is 8 MB.; Flash Memory Requirements
Evaluation Platform Board Manual 29 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.4.2 Flash Memory Requirements Total Flash memory size is 8 MB. Table 8. Flash Memory Requirements Description IQ80332 Total Flash size is 8 MB80332 Flash technology is based on Intel StrataFlash ® family 8...
Page 30 - Interrupt Routing; External Interrupt Routing to Intel
30 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.5 Interrupt Routing The 80332 Interrupt routing. Table 9. External Interrupt Routing to Intel ® 80332 I/O Processor Interrupt System Resource HPI# Temperature Sensor, Header S_INTA# PCI-X Slot INTB#, Heade...
Page 31 - The 80332 populates the peripheral bus as depicted by; Peripheral Bus Features
Evaluation Platform Board Manual 31 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.6 Intel ® IQ80332 I/O Processor Evaluation Platform Board Peripheral Bus The 80332 populates the peripheral bus as depicted by Figure 7 . The devices on the bus include Flash ROM, audio buzzer, CPLD, HEX d...
Page 32 - Flash ROM; Flash ROM Features; Flash Connection on Peripheral Bus
32 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.6.1 Flash ROM Table 11. Flash ROM Features Description Flash is an Intel StrataFlash ® technology – Part number: 28F640J3C Flash size is 8 MBThe connection to the peripheral bus is depicted by Figure 8 Fig...
Page 33 - UART; for more details. The audio buzzer’s; HEX Display; “Peripheral Bus Memory Map” on page 47; Rotary Switch Requirements
Evaluation Platform Board Manual 33 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.6.2 UART The 80332 has two integrated UARTs. Each asynchronous serial ports supports all the functions of a 16550 UART. The UART signals are connected to a dual RS-232 buffer and then to a RJ-11 serial por...
Page 34 - Battery Status; Please see; Battery Status Buffer Requirements
34 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.6.7 Battery Status A CPLD on the IQ80332 provides the following status for the battery. Please see Section 4.2.2, “Peripheral Bus Memory Map” on page 47 for more details on addressing the CPLD. Table 13. B...
Page 35 - Debug Interface; Console Serial Port; I/O Processor Evaluation Platform Board Peripheral Bus” on page 31
Evaluation Platform Board Manual 35 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.7 Debug Interface 3.7.1 Console Serial Port The platform has two serial ports for debug purposes as described in Section 3.6, “Intel ® IQ80332 I/O Processor Evaluation Platform Board Peripheral Bus” on pag...
Page 36 - JTAG Debug; JTAG Port
36 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.7.2 JTAG Debug The 80332 has a 20-pin JTAG connector (J7D2) that is in compliant with ARM Multi-ICE guidelines. 3.7.2.1 JTAG Port Figure 9. JTAG Port Pin-out A9457-01 VTref 1 nTRST 3 TDI 5 TMS 7 TCK 9 RTCK...
Page 37 - Board Reset Scheme; depicts the reset scheme for the 80332.; Reset Requirements/Schemes; RESET Sources; DDR II SDRAM; JTAG
Evaluation Platform Board Manual 37 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.8 Board Reset Scheme Figure 10 depicts the reset scheme for the 80332. Table 14 list the reset schemes for the 80332. Table 14. Reset Requirements/Schemes Description Primary PCI reset, resets all devices ...
Page 38 - Switches and Jumpers; Figure 11, “Default Switch Setting Switch S7A1” on page 38; Default Switch Settings of S7A1- Visual; Switch Summary
38 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.9 Switches and Jumpers 3.9.1 Switch Summary Please note that the term ‘open’ refers to the individual pin of switch S7A1 being pushed in at bottom (small dot on pin away from the ‘open’ label on the switch...
Page 39 - The following table in; Jumper Summary
Evaluation Platform Board Manual 39 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.9.3 Jumper Summary 3.9.4 Connector Summary 3.9.5 General Purpose Input/Output Header The following table in Section 19, “J2D2 GPIO Header Definition” on page 39 shows the GPIO signal assignments. The GPIO ...
Page 40 - Detail Descriptions of Switches/Jumpers; This switch resets the PCI-X B segment bus.; Rotary Switch Settings
40 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.9.6 Detail Descriptions of Switches/Jumpers 3.9.6.1 Switch S1C2: 80332 Reset This switch resets 80332. 3.9.6.2 Switch S6A1: BPCI-X Reset This switch resets the PCI-X B segment bus. 3.9.6.3 Switch S8A1: Rot...
Page 42 - Switch S7A1 - 10: SMBUS Slave Address 0: Settings and Operation Mode
42 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.9.6.4.7 Switch S7A1 - 7: SMBUS Manageability Address Bit 0 corresponding to signal name PBI_AD17 This allows 80332 to address SMBus Slave Address bit 0 (PBI_A17). 3.9.6.4.8 Switch S7A1 - 8: SMBUS Manageabi...
Page 43 - Jumper J1C1: JTAG Chain
Evaluation Platform Board Manual 43 Intel ® IQ80332 I/O Processor Hardware Reference Section 3.9.6.5 Jumper J7D1: Flash bit-width The Intel ® IQ80332 I/O processor evaluation platform board expects an 8-bit Flash enable. 3.9.6.6 Jumper J1C1: JTAG Chain 3.9.6.7 Jumper J1D2: UART Control Table 31. Jum...
Page 44 - Jumper J7B4: SMBus Header; Jumper J7B4: Descriptions; Jumper J7B4: Settings and Operation Mode; Jumper J9D3: Settings and Operation Mode; NC
44 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Hardware Reference Section 3.9.6.8 Jumper J7B4: SMBus Header 3.9.6.9 Jumper J9D3: Buzzer Volume Control Table 37. Jumper J7B4: Descriptions Jumper Description Factory Default J7B4 SMBus Header 1-2, 3-4 Table 38. Jumper J7B4: Settings ...
Page 45 - DRAM; Processor Developer ’s Manual.; Components on the Peripheral Bus; 0332 I/O Processor Developer ’s Manual.
Evaluation Platform Board Manual 45 Intel ® IQ80332 I/O Processor Software Reference Software Reference 4 4.1 DRAM For DDR SDRAM Sizes and Configurations, see theIntel ® 80332 I/O Processor Developer’s Manual. This section also contains multiple examples of Address Register Programming. See the Inte...
Page 46 - The Flash ROM is an 8 MB Intel StrataFlash; Flash Connection to Peripheral Bus
46 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Software Reference 4.2.1 Flash ROM The Flash ROM is an 8 MB Intel StrataFlash ® (part# 28F640) that sits on the Peripheral Bus and is accessed using PCE0. Under normal operation, the very first instruction access by the Intel XScale® ...
Page 47 - Peripheral Bus Memory Map
Evaluation Platform Board Manual 47 Intel ® IQ80332 I/O Processor Software Reference 4.2.2 Peripheral Bus Memory Map The Table 41 is the physical memory map of the devices on the 80332 Peripheral Bus: Table 41. Peripheral Bus Memory Map Address Range (in Hex) Size Data Bus Width Description C000 000...
Page 48 - depicts the memory space for the 80332 (before RedBoot boots):
48 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Software Reference 4.3 Board Support Package (BSP) Examples Examples provided in this section are based on the RedHat* RedBoot software running on the IQ80332. 4.3.1 Intel ® 80332 I/O Processor Memory Map Figure 13 depicts the memory ...
Page 49 - RedBoot Intel; From the installed directory:
Evaluation Platform Board Manual 49 Intel ® IQ80332 I/O Processor Software Reference 4.3.2 RedBoot* Intel ® 80332 I/O Processor Memory Map 4.3.3 RedBoot Intel ® 80332 I/O Processor Files Attached in the kit, find a copy of the RedHat eCos for IQ80332 CD. Once the CD is installed, you may find: • The...
Page 50 - RedBoot 80332 DDR Memory Initialization Sequence; Initialization Sequence:
50 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Software Reference 4.3.4 RedBoot 80332 DDR Memory Initialization Sequence In order to set the correct ECC bits, a DDR memory system (DIMM or discrete components) must be written to with a known value. This process requires 64-bit writ...
Page 53 - JTAG Support White Paper.; Purpose; Related Documents
Evaluation Platform Board Manual 53 Intel ® IQ80332 I/O Processor Getting Started and Debugger Getting Started and Debugger B B.1 Introduction This appendix pertains to Code|Lab version 2.3 and later which uses Microsoft's Visual Studio .NET. For Code|Lab version 2.2 and earlier, refer to appendix B...
Page 54 - Related Web Sites
54 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.1.4 Related Web Sites • Macraigor: http://www.ocdemon.net/ • http://developer.intel.com/design/intelxscale/dev_tools/021022/index.htm • http://developer.intel.com/design/iio/ • http://developer.intel.com...
Page 55 - Setup; Hardware Setup; Use
Evaluation Platform Board Manual 55 Intel ® IQ80332 I/O Processor Getting Started and Debugger B.2 Setup B.2.1 Hardware Setup Use Figure 14 and the rest of the Intel ® 80332 I/O Processor Evaluation Platform Board Manual, to set up the hardware. • Connect the Raven to the host via the parallel port ...
Page 56 - Software Setup; Software Flow Diagram
56 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.2.2 Software Setup ATI Code|Lab is a plug-in to Microsoft Visual Studio .NET, therefore Microsoft Visual Studio .NET must already be loaded on the system. To load ATI Code|Lab, run setup.exe under the pr...
Page 57 - New Project Setup; Creating a New Project
Evaluation Platform Board Manual 57 Intel ® IQ80332 I/O Processor Getting Started and Debugger B.3 New Project Setup B.3.1 Creating a New Project 1. Launch Code|Lab EDE for .NET. 2. On the Start Page, select “New Project”. a. The “New Projects” window appears. b. Select “Code|Lab Projects” under Pro...
Page 58 - Configuration
58 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.3.2 Configuration Examine the main menu of Code|Lab EDE for .NET. Since Code|Lab is a plug-in to Visual Studio, some of these menu items are Visual Studio and some are specific to Code|Lab. Click on any ...
Page 59 - Flashing with JTAG; Overview
Evaluation Platform Board Manual 59 Intel ® IQ80332 I/O Processor Getting Started and Debugger B.4 Flashing with JTAG B.4.1 Overview Code|Lab and Raven are capable of reading from, writing to, and erasing the contents of the Flash on the evaluation board. The board comes with RedBoot loaded in the F...
Page 60 - Using Flash Programmer
60 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.4.2 Using Flash Programmer Note: The parallel port must be set to EPP mode or the Macraigor Raven does not work properly. Download the RedBoot executable files from the following location: http://develop...
Page 61 - Debugging Out of Flash; When there are errors, carefully go back through
Evaluation Platform Board Manual 61 Intel ® IQ80332 I/O Processor Getting Started and Debugger B.5 Debugging Out of Flash JTAG debuggers can be used on two levels; with or without the source code. When the Flash is programmed, the debugger can monitor the executable code, halt it, step through it, a...
Page 62 - Running the Code|Lab Debugger; Launching and Configuring Debugger
62 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.7 Running the Code|Lab Debugger This section is provided to get the system up and running in the Code|Lab Debug environment, but it is not intended as a full-functional tutorial. Please refer to the ATI ...
Page 63 - Displaying Source Code
Evaluation Platform Board Manual 63 Intel ® IQ80332 I/O Processor Getting Started and Debugger B.7.3 Displaying Source Code 1. Launch the Code|Lab EDE Debugger and open the “Tester1LED” ELF program. Note: Use the File/Recent Programs menu for quick access. 2. Select the “Files” view in the lower tab...
Page 64 - Stepping Through the Code
64 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.7.5 Stepping Through the Code The “led.c” file contains a function that is called from code in “blink.c”. This exercise steps through the code and utilizes a few of the most common step tools. 1. Launch ...
Page 65 - Exploring the Code|Lab Debug Windows; Toolbar Icons
Evaluation Platform Board Manual 65 B.8 Exploring the Code|Lab Debug Windows This section discusses some basics of the debug environment. Some of these windows and concepts have been dealt with during previous exercises in this manual. However, many new windows are also discussed and basic interacti...
Page 66 - Registers Window; Click the “Watch” icon to bring up the Watch window.; Variables Window
66 Evaluation Platform Board Manual Intel ® IQ80332 I/O Processor Getting Started and Debugger B.8.6 Registers Window Close all the active windows, then bring up the Registers window. Resize the this window and its columns to get a good view of all the registers. Notice that there is a Flags tab at ...
Page 67 - Debugging Basics; Developer’s Manual, for more detailed information.; Software Breakpoints; of this Guide. Program execution can be halted at a; Hardware Breakpoints
Evaluation Platform Board Manual 67 B.9 Debugging Basics B.9.1 Overview Debuggers allow developers to interrogate application code by allowing program flow control, data observation, and data manipulation. The flow control functions include the ability to single-step through the code, step into func...
