Page 2 - Intel Confidential
2 536EX Chipset Developer’s Manual Intel Confidential Information in this document is provided in connection with Intel ® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Condi...
Page 3 - Contents
536EX Chipset Developer’s Manual 3 Intel Confidential Contents Contents 1 Introduction ...................................................................................................................................... 7 1.1 Controllerless Modem Driver Overview ......................................
Page 4 - Figures
4 536EX Chipset Developer’s Manual Intel Confidential Contents 9.2.1 Scratch Register (SCR) ......................................................................................... 95 9.2.2 Modem Status Register (MSR) .............................................................................. 95...
Page 5 - Tables
536EX Chipset Developer’s Manual 5 Intel Confidential Contents Tables 1 DTE-to-DCE Data Rates for Each Mode .................................................................................... 11 2 DCE-to-DCE Data Rates for Each Mode .....................................................................
Page 6 - Revision History
6 536EX Chipset Developer’s Manual Intel Confidential Contents Revision History Date Revision Description January 2002 002 Changed references to “HaM Data Fax Voice” to “Intel 536EP V.92 Modem.” August 2001 001 Initial release
Page 7 - Introduction; Controllerless Modem Driver Overview; The functional block diagram in
536EX Chipset Developer’s Manual 7 Intel Confidential Introduction 1 This developer’s manual describes the software interface for Intel® 536EX (controllerless and controller) chipset solutions. The controllerless-based solutions include the 536EP for PCI and Mini-PCI. Refer to the chipset datasheets...
Page 8 - Figure 1. WDM Driver Block Diagram; Modem drivers stack; Hardware; User; User applications
8 536EX Chipset Developer’s Manual Intel Confidential Introduction 1.1.2 Windows 95 and Windows 98 When the controllerless modem chipsets are used with Microsoft Windows 95 and Windows 98 applications, the traditional UART and serial port emulations are replaced by the proprietary HaM Mini Port driv...
Page 9 - Figure 2. VxD Mini Port Driver Block Diagram; APPLICATION; SYSTEM VIRTUAL MACHINE
536EX Chipset Developer’s Manual 9 Intel Confidential Introduction When the controllerless chipsets are used with MS-DOS* applications, however, a UART emulation is required. Intel provides an additional driver called Intelsdb.VxD, which includes a UART emulation. Please refer to Section 9.1, “UART ...
Page 10 - Modem Connection Overview; Examples of AT command strings:
10 536EX Chipset Developer’s Manual Intel Confidential Introduction 1.3 Modem Connection Overview The DCE (modem) operates in one of two states: command or online. In each state, both data and commands (including DCE responses) are transferred through the UART THR (Transmit Holding register) and the...
Page 11 - AT Commands Overview
536EX Chipset Developer’s Manual 11 Intel Confidential Introduction The modem recognizes AT commands from the DTE at any valid data rate from 300 bps to 115,200 bps (that is, the modem autobauds up to 115,200 bps); however, the DTE should use the data rate specified for each mode according to the tr...
Page 12 - Sending Commands; Table 4; Table 4. DTE-Modem Data Rate Response Codes
12 536EX Chipset Developer’s Manual Intel Confidential Introduction 1.4.1 Sending Commands All command lines sent to the modem, except for A/, must be preceded by an ‘AT’ and terminated by the contents of S-register S3 (typically a carriage return <CR>). AT stands for ‘attention’ and prompts t...
Page 13 - AT Escape Sequences
536EX Chipset Developer’s Manual 13 Intel Confidential Introduction 1.4.2 AT Escape Sequences The 536EX provides the industry-standard escape sequence, TIES (Time Independent Escape Sequence). TIES is designed to work with existing communication software written for the Hayes Escape Sequence. Upon s...
Page 14 - AT Command Summary Tables; Table 5. Data Mode Command Summary
14 536EX Chipset Developer’s Manual Intel Confidential AT Command Summary Tables AT Command Summary Tables 2 This section contains summary tables of all AT commands, S-registers, and between AT commands and S-registers. These commands are fully described in the relevant sections of the 536EX Develop...
Page 21 - Table 7. Fax Identity Command Summary
536EX Chipset Developer’s Manual 21 Intel Confidential AT Command Summary Tables +DS44=m V.44 Data Compression 3, 0, 0, 471, 942, 140, 140, 1884, 3768 no +EFCS Controls the 32-bit frame check sequence option in V.42 0 0–2 no +ER=m Controls error control reporting 0 0, 1 no m=0 Disabled m=1 Enabled *...
Page 22 - DCE Character Pairs
22 536EX Chipset Developer’s Manual Intel Confidential AT Command Summary Tables Note: See the complete command description in the 536EX Developer ’s Manual for range information. Table 9. IS-101 Voice Command Summary Command Function Default Range Reported by &Vn +FCLASS=8 Voice mode selection ...
Page 24 - Table 12. Dial Modifiers
24 536EX Chipset Developer’s Manual Intel Confidential AT Command Summary Tables f 66 Data answer detected (2225 Hz) R 52 Incoming ring % ‘ (,) 25, 26, 27, 28, 29 Manufacturer-specified Table 12. Dial Modifiers Command Function 0 to 9 Dialing digits A, B, C, D, *, # Tone dial characters P Pulse dial...
Page 26 - Data Mode AT COMMANDS; The 536EX chipsets implement:
26 536EX Chipset Developer’s Manual Intel Confidential Data Mode AT COMMANDS Data Mode AT COMMANDS 3 The 536EX chipsets implement: • Standard Hayes*-compatible AT commands and S-registers in data mode • Standard EIA/TIA-578 AT commands in Class 1 fax mode • Additional AT command sets for error corre...
Page 27 - ) can affect which ATWn; Table 14. Data Reporting Wn Mapping; Figure 3. Example of a Remote Connection
536EX Chipset Developer’s Manual 27 Intel Confidential Data Mode AT COMMANDS The DCE can be configures to use different response codes depending on the V.250 command that is enabled (AT+MR, AT+ER, AT+DR, and AT+ILRR). Alternatively, the ATWn command can be used to set these V.250 commands. The mappi...
Page 28 - &F configures the modem for factory defaults.; Stores a telephone number into the NVRAM as phone number 2, which
28 536EX Chipset Developer’s Manual Intel Confidential Data Mode AT COMMANDS • ATW3 +MCR: V90 +MRR: 28800 +ER: LAPM +DR: V42B +ILRR: 115200 CONNECT 50666 • ATW4 +MCR: V90 +MRR: 28800 +ER: LAPM +DR: V42B CONNECT 50666 3.3 Modem Reset and NVRAM Commands [DS=m, Zn, &F, &Vn, &Yn, &Wn, &a...
Page 29 - Table 15. Product Identification Information
536EX Chipset Developer’s Manual 29 Intel Confidential Data Mode AT COMMANDS 3.4 Modem Identification Commands [In, +FMI, +FMR, +FMM, +GMI, +GMM, +GMR, +GSN,+FMFR?, +FMDL?, +FREV?] The modem provides product identification AT commands that help determine the modem’s manufacturer, model number, and p...
Page 35 - Table 16. Supported Modulation Types
536EX Chipset Developer’s Manual 35 Intel Confidential Data Mode AT COMMANDS If the +MS=m parameters contain conflicting information like “+MS=V34,1,14400,0” with a DTE data rate of 2400 bps, then the modem’s connection attempts always fail, and the modem reports a “NO CARRIER” message. This happens...
Page 37 - Figure 6. Local Analog Loopback Test; LOCAL MODEM; Figure 7. Local Analog Loopback with Self-Test
536EX Chipset Developer’s Manual 37 Intel Confidential Data Mode AT COMMANDS Local Modem (or Test Modem) AT&F &W<CR> Returns the modem to the factory defaults. AT S18 = 0 &T1 Causes the modem to run local analog loopback without self-test. CONNECT 115200 Modem response code indicat...
Page 38 - Time-Independent Escape Sequence; Licensing Requirements for Hayes Escape Sequence
38 536EX Chipset Developer’s Manual Intel Confidential Data Mode AT COMMANDS Local Modem (or Test Modem) AT&F &W<CR> Returns the modem to the factory defaults. AT S18=20 &T8 Causes the modem to start local analog loopback with self-test for 20seconds. OK After starting analog loopb...
Page 40 - Hayes* Escape Sequence; preceding and following guard times (S12); Table 18. Data Mode Command Descriptions
40 536EX Chipset Developer’s Manual Intel Confidential Data Mode AT COMMANDS DTE: +++ AT<CR> DCE: OK Note: TIES requires that the three-character escape sequence be contiguous and not repeated. The character immediately preceding the first character of the three-character sequence cannot be th...
Page 56 - Error Correction and Data Compression; lists connection types corresponding to +ES settings.
56 536EX Chipset Developer’s Manual Intel Confidential Error Correction and Data Compression Error Correction and Data Compression 4 The 536EX chipsets support two types of data mode error correction (MNP 2–4 and V.42) and data compression (V.44, MNP 5, and V.42 bis). V.42 error correction uses LAPM...
Page 57 - Table 20. Resulting +ES Connection Types
536EX Chipset Developer’s Manual 57 Intel Confidential Error Correction and Data Compression The list of commands needed to enter a specific error correction or data compression mode are as follows: V.42 bis with fallback to MNP5, &F +ES=3,0,2 or +ES=3,0,2 “H3 %C1 MNP2–4 or V.42: V.42 bis with f...
Page 64 - Fax Class 1 AT Commands; all other fax AT commands are; Fax Identity Commands; Each command may be used as follows:; Table 22. Fax Identity Command Descriptions
64 536EX Chipset Developer’s Manual Intel Confidential Fax Class 1 AT Commands Fax Class 1 AT Commands 5 The 536EX chipsets implement the EIA-578 data/fax Class 1 AT command set standard. This AT command set allows a DTE (with Class 1 communication software) and a 536EX-based modem to communicate wi...
Page 67 - Table 24. Fax Mode Command Descriptions
536EX Chipset Developer’s Manual 67 Intel Confidential Fax Class 1 AT Commands The ATDT <telephone number> command string causes the modem to originate a fax call. After dialing the telephone number, the modem sends out a calling tone (1100 Hz), recognizes the remote fax modem answer tone, and...
Page 70 - IS-101 Voice Mode AT Commands
70 536EX Chipset Developer’s Manual Intel Confidential IS-101 Voice Mode AT Commands IS-101 Voice Mode AT Commands 6 The 536EX chipsets implement a voice mode AT command set that allows a DTE to record and play back voice messages. This product is compatible with the EIA/TIA IS-101 voice command set...
Page 71 - DTMF Detection Reporting; For example, a single 280ms burst of DTMF 5 would report:; Relay Control; The following data and fax AT commands are supported in voice mode:; Table 25. Voice Mode Command Descriptions
536EX Chipset Developer’s Manual 71 Intel Confidential IS-101 Voice Mode AT Commands 6.1 DTMF Detection Reporting DTMF detection information is reported by the modem to the DTE by a <DLE> shielded command as outlined in Section 6.5 of the ITU V.253 specification. When the DTMF burst is detecte...
Page 77 - Preassigned Voice I/O Labels
536EX Chipset Developer’s Manual 77 Intel Confidential IS-101 Voice Mode AT Commands +VLS=m 0 Relay/Playback Control: This command controls the four µ P relay drivers and controls hardware paths for voice playback/record transmit and receive. Preassigned Voice I/O Labels Table 25. Voice Mode Command...
Page 78 - Voice I/O Primitive Codes
78 536EX Chipset Developer’s Manual Intel Confidential IS-101 Voice Mode AT Commands +VLS=m (cont.) 0 Relay/Playback Control: (cont.) Voice I/O Primitive Codes NOTE: For speakerphone applications, see ATI10, +VSP, and “Speakerphone AT Command Requirements” in the Voice Application Note for more deta...
Page 85 - Table 26. S-Register Command Descriptions
536EX Chipset Developer’s Manual 85 Intel Confidential S-Registers S-Registers 7 The 536EX chipsets provide direct access to the internal registers known as S-registers. The DTE uses S-registers to set up and check modem configurations. The contents of these registers can be changed using the ATSn=x...
Page 90 - Caller ID; Table 27. Caller ID Tags for Formatted Reporting
90 536EX Chipset Developer’s Manual Intel Confidential Caller ID Caller ID 8 This section describes Caller ID for the United States. Caller ID is a service that lets the called party know the telephone number of the caller before the call is answered. The information transmitted to the called party ...
Page 92 - UART Emulation in the Controllerless Modem; Driver Overview” on page 7; Figure 11. UART Emulation in Intelsdb.VxD
92 536EX Chipset Developer’s Manual Intel Confidential Parallel Host Interface 16C450/16C550A UART Parallel Host Interface 16C450/16C550A UART 9 9.1 UART Emulation in the Controllerless Modem When controllerless modems are used with Windows applications, the communication driver architecture elimina...
Page 93 - Figure 12. FIFO Buffers for Transmitter and Receiver
536EX Chipset Developer’s Manual 93 Intel Confidential Parallel Host Interface 16C450/16C550A UART modem for each data interrupt, instead of only a single byte, as in 16C450 mode. The following diagram shows how the FIFO is used. Host software using this FIFO capability can significantly reduce syst...
Page 94 - Figure 13. Parallel Host Interface UART Register Bit Assignments
Figure 13. Parallel Host Interface UART Register Bit Assignments NOTE: These bits are always ‘0’ in 16C450 mode. REGISTER NAME REGISTER ADDRESS 7 6 5 4 3 2 1 0 BIT NUMBER 7 Scratch register (SCR) DLAB=0 6 5 4 3 2 1 0 0 DLAB=0 DLAB=0 1 DLAB=1 0 DLAB=1 Divisor Latch (MS) Divisor Latch (LS) MS Divisor ...
Page 95 - UART Register Definitions; P HINT pin whenever
536EX Chipset Developer’s Manual 95 Intel Confidential Parallel Host Interface 16C450/16C550A UART 9.2 UART Register Definitions 9.2.1 Scratch Register (SCR) This is an 8-bit read/write register used by the DTE for temporary storage of data. 9.2.2 Modem Status Register (MSR) This register provides f...
Page 97 - This register controls the DTE-DCE UART interface.
536EX Chipset Developer’s Manual 97 Intel Confidential Parallel Host Interface 16C450/16C550A UART 9.2.4 Modem Control Register (MCR) This register controls the DTE-DCE UART interface. 9.2.5 Line Control Register (LCR) This register specifies the asynchronous data communication exchange format. The ...
Page 98 - Register 2
98 536EX Chipset Developer’s Manual Intel Confidential Parallel Host Interface 16C450/16C550A UART 9.2.6 FIFO Control Register (FCR) This write-only register is used to enable the receiver and transmitter FIFOs, clear the FIFOs, set the RCVR FIFO trigger level, and select the DMA signaling type. Bit...
Page 99 - FIFO EN; Table 28. Interrupt Control Functions
536EX Chipset Developer’s Manual 99 Intel Confidential Parallel Host Interface 16C450/16C550A UART 9.2.7 Interrupt Identity Register (IIR) b This read-only register indicates when the transmitter and receiver FIFOs are enabled, and the source of highest-priority pending interrupt to the DTE. Five le...
Page 101 - RBR; Table 29. Programmable Data Rates
536EX Chipset Developer’s Manual 101 Intel Confidential Parallel Host Interface 16C450/16C550A UART 9.2.10 Receiver Buffer Register (RBR) The RBR (Receiver Buffer register) is a read-only register used for receiving data and AT command responses from the modem. 9.2.11 Divisor Latch Registers (DLM an...
Page 102 - FIFO Interrupt Mode Operation; UART initiates RCVR interrupts under the following conditions:; FIFO Polled Mode Operation
102 536EX Chipset Developer’s Manual Intel Confidential Parallel Host Interface 16C450/16C550A UART 9.3 16C550A UART FIFO Operation The modem 16C550A UART FIFO works in both interrupt and polled operation. A description of each type of operation is provided below. 9.3.1 FIFO Interrupt Mode Operation...
Page 103 - LSR7 indicates when any errors occur in the RCVR FIFO.
536EX Chipset Developer’s Manual 103 Intel Confidential Parallel Host Interface 16C450/16C550A UART • LSR7 indicates when any errors occur in the RCVR FIFO. • TEMT indicates when both the XMIT FIFO and Shift registers are empty. • The THRE bit (LSR5) is set to ‘1’ whenever the XMIT FIFO is empty. • ...