Page 2 - Design Guide
2 Design Guide Information in this document is provided in connection with Intel ® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel ...
Page 3 - Contents; Figures
Design Guide 3 Contents Contents 1.0 Functional Overview ........................................................................................................................ 5 1.1 21143 Overview ........................................................................................................
Page 4 - Tables
4 Design Guide Contents 9 AUI 10BASE2 Network Connection ............................................................................................ 17 10 21143 External Component Connections ................................................................................... 20 11 LED Time-Stretche...
Page 5 - Intel; Functional Overview; Network Interface; Table 1; Description
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 5 This design guide provides a description of how to implement 100BASE-TX and 10BASE-T network connections using the 21143 PCI/CardBus 10/100 Mb/s Ethernet LAN Controller (referred to as the 21143). While this document will no...
Page 6 - MII-Based PHY Block Diagram; Figure 1; SYM-Based PHY Block Diagram; Figure 2
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 6 Design Guide The 21143 implements the 100BASE-T MII layer and the 100/10 Mb/s Ethernet MAC layer. The 21143 provides a dual network interface for both a 100BASE-T and a 10 Mb/s Ethernet. At the 100BASE-T port, the 21143 supports the indu...
Page 7 - The SYM-based PHY design includes the following components:; Table 2. AUI Signals
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 7 SYM-based PHY devices are provided by GEC Plessey*, Quality Semiconductor*, and Micro Linear*. The SYM-based PHY design includes the following components: • The SYM-based PHY devices, which have a direct interface to the SYM...
Page 8 - Table 5; Table 4. MII Signals; Table 5. SYM Signals
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 8 Design Guide Table 5 lists the active SYM signals when the 21143 SYM port is selected. Table 4. MII Signals Signal Pin Number mii_clsn 118 mii_crs 117 mii_dv 129 mii_mdc 134 mii_mdio 135 mii_rclk 128 mii_rx_err 127 mii_rxd <3:0> 13...
Page 9 - Network Connection
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 9 3.0 Network Connection The network connections of the 21143 can be used in 10BASE-T, AUI, MII, or SYM configurations. Different methods are used to connect each port to the actual cable connector. 3.1 10BASE-T Twisted-Pair N...
Page 11 - Figure 4; Figure 4. 10BASE-T Network Connection Without Buffers
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 11 Figure 4 shows the 10BASE-T network connection without buffers. The required components for this configuration are as follows: • Terminating and decoupling components • Transformer module (ratio of 1: for swing compensation...
Page 12 - Figure 5; Figure 5. Minimum Components Required for 10BASE-T
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 12 Design Guide Figure 5 shows the minimum component requirement for the 10BASE-T network connection. This implementation uses a filter transformer module with a 1: transformer on the transmit path to compensate for the voltage swing. The ...
Page 13 - Internal Optional Daughtercard; Figure 6; Description of 100-Ready Daughtercard Block Diagram; RJ45 — A network connection.; Table 6. Internal vs. External Design Features
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 13 3.2.1 Internal Optional Daughtercard Figure 6 shows a block diagram of a 100-Ready design using a daughter card. 3.2.2 Description of 100-Ready Daughtercard Block Diagram The blocks in the10BASE-T 100-Ready block diagram re...
Page 14 - 00-Ready External Module Design; Figure 7; Description of 100-Ready External Module Block Diagram
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 14 Design Guide 3.2.3 100-Ready External Module Design Figure 7 shows a block diagram of a 100-Ready design using an external module. 3.2.4 Description of 100-Ready External Module Block Diagram The blocks in the100-Ready external module b...
Page 15 - AUI Network Port; Figure 8
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 15 3.3 AUI Network Port The 21143 is fully compliant with the AUI standard. The AUI can interface with an external medium-attachment unit (MAU) and connect to alternate media, such as 10BASE2 (ThinWire) and 10BASE5 (thickwire)...
Page 17 - Figure 9; Figure 9. AUI 10BASE2 Network Connection
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 17 Figure 9 shows the AUI 10BASE2 network connection. In this configuration, the AUI is not externally exposed. The required components for this configuration are as follows: • Isolation transformer • Terminating and decouplin...
Page 18 - Media-Specific Components; Table 8; Table 9. 10BASE2 and 10BASE5 Media-Specific Components
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 18 Design Guide 3.4 Media-Specific Components Table 8 lists the media-specific interface components for 10BASE-T access. Table 10 lists the media-specific interface components for 10BASE2 and 10BASE5 access. Table 8. 10BASE-T Media-Specifi...
Page 19 - Unused JTAG port requirements; Unused JTAG Port Requirements; shows the external component connections.; Table 10. Pin Requirements When Not Using the JTAG Port; Table 11. Current Reference and Capacitor Inputs
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 19 4.0 21143 Requirements This section provides information about the external component connections for the 21143, and describes the following requirements: • Unused JTAG port requirements • Current reference and capacitor in...
Page 20 - Crystal and Crystal Oscillator Connections; The 21143 also supports a crystal oscillator (; Figure 10. 21143 External Component Connections; Table 12. Crystal Specifications
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 20 Design Guide 4.3 Crystal and Crystal Oscillator Connections Figure 10 shows two serial clock connections; select either the crystal connection or the crystal oscillator connection. According to the IEEE 802.3 standard, a 20 MHz crystal ...
Page 21 - Signal Routing and Placement; Keep all signal paths short and route them as directly as possible.; Ground and Power Planes; Gnd is adapter ground.
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 21 5.0 Signal Routing and Placement The Ethernet circuitry should be kept free of interference from unrelated signal traces. Routing for other signals must be kept away from the space surrounding the grouped Ethernet component...
Page 22 - Three each at 0.1 μ F; LED Status Signals; shows how to implement this circuit.
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 22 Design Guide Intel also recommends that the connector’s shield of the adapter should be connected to the PC chassis. 5.1.1 3.3 V Power Supply The 21143 operates with a power supply of 3.3 V. At least eight decoupling capacitors are reco...
Page 23 - Design Considerations; Designing the Ethernet Corner on Motherboards; Suggestions for Quiet Ground and Power Planes; Fundamentals of Electromagnetic Capability, by William G. Duff
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller Design Guide 23 6.0 Design Considerations This section provides information to aid the user in designing Ethernet and Fast Ethernet capabilities onto a motherboard. In addition, it also includes design considerations for FCC compliance. 6....
Page 24 - Engineering Electromagnetic Capability, by V. Prasad Kodali; Suggestions for Routing; For routing information, consider the following suggestions:
Intel ® 21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller 24 Design Guide • Engineering Electromagnetic Capability, by V. Prasad Kodali 6.2.2 Suggestions for Routing For routing information, consider the following suggestions: • Never route any etch (power or ground) across a partition or void be...
