HP DX61XX - Manual - manualsarea.com

Page 2 - Technical Reference Guide; HP Compaq dc71xx and dx61xx Series Business Desktop Computers

© Copyright 2005 Hewlett-Packard Development Company, L.P.The information contained herein is subject to change without notice. Microsoft, MS-DOS, Windows, and Windows NT are trademarks of Microsoft Corporation in the U.S. and other countries. Intel, Pentium, Intel Inside, and Celeron are trademarks...

Page 3 - Contents; Introduction

Technical Reference Guide 361834-002 iii Contents 1 Introduction 1.1 About this Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1 1.1.1 Online Viewing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....

Page 4 - System Support

iv 361834-002 Technical Reference Guide Contents 3.2.2 Processor Upgrading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4 3.3 Memory Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5 - Integrated Graphics Subsystem

Technical Reference Guide 361834-002 v Contents 5.5.4 Parallel Interface Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–155.5.5 Parallel Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 6 - BIOS ROM

vi 361834-002 Technical Reference Guide Contents 8 BIOS ROM 8.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–18.2 ROM Flashing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ....

Page 7 - Introduction; About this Guide; When viewing with Adobe Acrobat Reader, click on the (; Additional Information Sources; Standard Microsystems Corporation:

Technical Reference Guide 361834-002 1-1 1 Introduction 1.1 About this Guide This guide provides technical information about HP Compaq dx71xx and dc61xx series personal computers that feature the Intel Pentium 4 processor and the Intel 915G chipset. This document describes in detail the system's des...

Page 8 - Numbering; The model numbering convention or HP systems is as follows:

1-2 361834-002 Technical Reference Guide Introduction 1.3 Model Numbering Convention The model numbering convention or HP systems is as follows:

Page 9 - Number

Technical Reference Guide 361834-002 1-3 Introduction 1.4 Serial Number The unit's serial number is located on a sticker placed on the exterior cabinet. The serial number is also written into firmware and may be read with HP Diagnostics or Insight Manager utilities. 1.5 Notational Conventions The no...

Page 10 - Common Acronyms and Abbreviations; Table 1-1 lists the acronyms and abbreviations used in this guide.; Acronyms and Abbreviations; Description

1-4 361834-002 Technical Reference Guide Introduction 1.6 Common Acronyms and Abbreviations Table 1-1 lists the acronyms and abbreviations used in this guide. Table 1-1 Acronyms and Abbreviations Acronym orAbbreviation Description A ampere AC alternating current ACPI Advanced Configuration and Power...

Page 17 - System Overview; This chapter includes the following topics:

Technical Reference Guide 361834-002 2-1 2 System Overview 2.1 Introduction The HP Compaq dc71xx and dx61xx Series Business Desktop Computers (Figure 2-1) deliver an outstanding combination of manageability, serviceability, and compatibility for enterprise environments. Based on the Intel Pentium 4 ...

Page 18 - Features And Options

2-2 361834-002 Technical Reference Guide System Overview 2.2 Features And Options This section describes the standard features. 2.2.1 Standard Features The following standard features are included on all series inless otherwise indicated: ■ Intel Pentium 4 processor in LGA775 (Socket T) package ■ In...

Page 19 - Difference Matrix by Form Factor

Technical Reference Guide 361834-002 2-3 System Overview Table 2-1 shows the differences in features between the different PC series based on form factor: NOTE:[1] Supported on system board. Requires optional cable/bracket assembly.[2] Accepts low-profile, reversed-layout ADD2/SDVO card: height = 2....

Page 20 - Design; This guide covers six form factors:

2-4 361834-002 Technical Reference Guide System Overview 2.3 Mechanical Design This guide covers six form factors: ■ Ultra Slim Desktop (USDT)—Very slim design that can be used in a tradition desktop (horizontal) orientation or as a small tower mounted in the supplied tower stand. ■ Small Form Facto...

Page 21 - Front Views; Figure 2-2. HP Compaq dc7100 USDT Front View

Technical Reference Guide 361834-002 2-5 System Overview 2.3.1 Cabinet Layouts Front Views Figure 2-2 shows the front panel components of the Ultra Slim Desktop (USDT) format factor. Figure 2-2. HP Compaq dc7100 USDT Front View Item Description Item Decription 1 MultiBay device bay 5 USB ports 7, 8 ...

Page 22 - Figure 2-3. HP Compaq dc7100 SFF Front View

2-6 361834-002 Technical Reference Guide System Overview Figure 2-3 shows the front panel components of the Small Form Factor (SFF). Figure 2-3. HP Compaq dc7100 SFF Front View Item Description Item Decription 1 Diskette drive activity LED 7 Microphone audio In jack 2 Diskette drive media door 8 Hea...

Page 23 - Figure 2-4. HP Compaq dx6100 ST Front View

Technical Reference Guide 361834-002 2-7 System Overview Figure 2-4 shows the front panel components of the Slim Tower (ST) form factor. Figure 2-4. HP Compaq dx6100 ST Front View Item Description Item Decription 1 Micorphone audio In jack 7 Diskette drive activity LED 2 Headphone audio Out jack 8 D...

Page 24 - Figure 2-5. HP Compaq dx6100 MT Front View

2-8 361834-002 Technical Reference Guide System Overview Figure 2-5 shows the front panel components of the microtower (uT) form factor. Figure 2-5. HP Compaq dx6100 MT Front View Item Description Item Decription 1 CD-ROM drive 7 CD-ROM drive open/close button 2 CD-ROM drive activity LED 8 Power but...

Page 25 - Figure 2-6. HP Compaq dc7100 CMT Front View

Technical Reference Guide 361834-002 2-9 System Overview Figure 2-6 shows the front panel components of the Convertable Minitower (CMT) form factor. Figure 2-6. HP Compaq dc7100 CMT Front View Item Description Item Decription 1 CD-ROM drive 7 CD-ROM drive open/close button 2 CD-ROM drive activity LE...

Page 26 - Rear Views; Figure 2-7 shows the rear view of the USDT form factor.

2-10 361834-002 Technical Reference Guide System Overview Rear Views Figure 2-7 shows the rear view of the USDT form factor. Figure 2-7. HP Compaq dc7100 USDT, Rear View Item Description Item Description 1 NIC (LAN) connector (RJ-45) 6 Mouse connector (PS/2) 2 VGA monitor connector (DB-15) 7 Keyboar...

Page 29 - Figure 2-10 shows the rear view of the MT form factor.

Technical Reference Guide 361834-002 2-13 System Overview Figure 2-10 shows the rear view of the MT form factor. NOTE: [1] Switch not present on SKUs that feature auto-ranging power supply. Figure 2-10. HP Compaq dx6100 MT, Rear View Item Description Item Description 1 AC voltage select switch [1] 8...

Page 30 - Figure 2-11 shows the rear view of the CMT form factor.

2-14 361834-002 Technical Reference Guide System Overview Figure 2-11 shows the rear view of the CMT form factor. Figure 2-11. HP Compaq dc7100 CMT, Rear View Item Description Item Description 1 USB ports 5, 6 7 Mouse connector (PS/2) 2 Microphone audio In 8 Parallel port connector (DB-25) 3 VGA mon...

Page 31 - UIltra Slim Desktop Chassis

Technical Reference Guide 361834-002 2-15 System Overview 2.3.2 Chassis Layouts This section describes the internal layouts of the chassis. For detailed information on servicing the chassis refer to the multimedia training and/or the maintenance and service guide for these systems. UIltra Slim Deskt...

Page 32 - Small Form Factor / Slim Tower Chassis; One PCI Express x16 graphics/SDVO slot

2-16 361834-002 Technical Reference Guide System Overview Small Form Factor / Slim Tower Chassis The chassis layouts for the Small Form Factor (SFF) used for the HP Compaq dc7100 models and the Slim Tower (ST) used for the HP Comapq dx6100 models are shown in Figure 2-13. Features include: ■ Tilting...

Page 33 - Microtower Chassis; Externally accessible drive bay assembly.

Technical Reference Guide 361834-002 2-17 System Overview Microtower Chassis Figure 2-14 shows the layout for the Microtower (MT) chassis used for the HP Compaq dx6100 models. Features include: ■ Externally accessible drive bay assembly. ■ Easy access to expansion slots and all socketed system board...

Page 34 - Convertible Minitower

2-18 361834-002 Technical Reference Guide System Overview Convertible Minitower Figure 2-15 shows the layout for the Convertible Minitower (CMT) chassis in the minitower configuration used for HP Compaq dc7100 models. Features include: ■ Externally accessible drive bay assembly may be configured for...

Page 36 - r e

2-20 361834-002 Technical Reference Guide System Overview NOTE: See SFF and ST rear chassis illustrations for externally accessible I/O connectors. Figure 2-17. SFF / ST System Board Item Description Item Description 1 Serial port B header 14 Front panel audio header 2 Battery 15 Chassis speaker con...

Page 37 - Figure 2-18. MT / CMT System Board and CMT PCI Expansion Board; p o

Technical Reference Guide 361834-002 2-21 System Overview NOTES: See MT and CMT rear chassis illustrations for externally accessible I/O connectors. [1] Applicable to CMT chassis only. [2] Not included on MT system boards. Figure 2-18. MT / CMT System Board and CMT PCI Expansion Board Item Descripti...

Page 38 - Architecture; Table 2-2 lists the differences between models.; Architectural Differences By Form Factor

2-22 361834-002 Technical Reference Guide System Overview 2.4 System Architecture The systems covered in this guide feature an architecture based on the Intel Pentium 4 processor and the Intel 915G chipset (Figure 2-11). These systems allow processor upgrading with the Intel Pentium 4 family and off...

Page 39 - Figure 2-19 System Architecture, Block diagram

Technical Reference Guide 361834-002 2-23 System Overview Figure 2-19 System Architecture, Block diagram Parallel I/F [1] Pentium 4 Processor 915G/GV Chipset 915 [2] 82801 GMCH SDRAM Cntlr PCI Exp. PEG I/F [1] PCI Express ICH6 SATA I/F USB I/F Ch A DDR/DDR2 SDRAM Ch B DDR/DDR2 SDRAM LPC47B397 I/O Cn...

Page 40 - Figure 2-20. Processor Socket and Processor Package; To remove the processor:

2-24 361834-002 Technical Reference Guide System Overview 2.4.1 Intel Pentium 4 Processor The models covered in this guide feature the Intel Pentium 4 processor with Hyper-Threading technology. This processor is backward-compatible with software written for the Pentium III, Pentium II, Pentium MMX, ...

Page 41 - Chipset Components

Technical Reference Guide 361834-002 2-25 System Overview 2.4.2 Chipset The chipset consists of a Graphics Memory Controller Hub (GMCH), an enhanced I/O controller hub (ICH), and a firmware hub (FWH). Table 2-3 compares the functions provided by the chipsets. NOTE: [1] Or equivalent component. Table...

Page 42 - Support Component Functions

2-26 361834-002 Technical Reference Guide System Overview 2.4.3 Support Components Input/output functions not provided by the chipset are handled by other support components. Some of these components also provide “housekeeping” and various other functions as well. Table 2-4 shows the functions provi...

Page 44 - Integrated Graphics Subsystem Statistics; Integrated Graphics Controller

2-28 361834-002 Technical Reference Guide System Overview 2.4.9 Graphics Subsystem These systems use the 82915G or 82915GV GMCH component that integrates an Intel graphics controller that can drive an external VGA monitor. The integrated graphics controller (IGC) features a 333-MHz core processor an...

Page 47 - Diskette Drive Specifications

Technical Reference Guide 361834-002 2-31 System Overview Table 2-9 Diskette Drive Specifications Parameter Measurement Media Type 3.5 in 1.44 MB/720 KB diskette Height 1/3 bay (1 in) Bytes per Sector 512 Sectors per Track: High Density Low Density 18 9 Tracks per Side: High Density Low Density 8080...

Page 48 - Optical Drive Specifications; Parameter

2-32 361834-002 Technical Reference Guide System Overview Table 2-10 Optical Drive Specifications Parameter 48x CD-ROM 48/24/28x CD-RW Drive Interface Type IDE IDE Media Type (reading) Mode 1,2, Mixed Mode, CD-DA, Photo CD, Cdi, CD-XA Mode 1,2, Mixed Mode, CD-DA, Photo CD, Cdi, CD-XA Media Type (wri...

Page 49 - Hard Drive Specifications

Technical Reference Guide 361834-002 2-33 System Overview Table 2-11 Hard Drive Specifications Parameter 40 GB 80 GB 160 GB Drive Size 3.5 in 3.5 in 3.5 in Interface SATA SATA SATA Transfer Rate 150 MB/s 150 MB/s 150 MB/s Drive Protection System Support? Yes Yes Yes Typical Seek Time (w/settling) Si...

Page 51 - Processor/Memory Subsystem

Technical Reference Guide 361834-002 3-1 3 Processor/Memory Subsystem 3.1 Introduction This chapter describes the processor/memory subsystem. These systems feature the Intel Pentium 4 processor and the 915G chipset (Figure 3-1). The dx6100 and dc7100 models support PC2700 or PC3200 DDR memory and co...

Page 52 - Processor; Streaming video/audio processing

3-2 361834-002 Technical Reference Guide Processor/Memory Subsystem 3.2 Pentium 4 Processor These systems each feature an Intel Pentium 4 processor in a FC-LGA775 package mounted with a passive heat sink in a zero-insertion force socket. The mounting socket allows the processor to be easily changed ...

Page 53 - Figure 3-2. Pentium 4 Processor Internal Architecture

Technical Reference Guide 361834-002 3-3 Processor/Memory Subsystem Figure 3-2 illustrates the internal architecture of the Intel Pentium 4 processor. Figure 3-2. Pentium 4 Processor Internal Architecture The Intel Pentium 4 increases processing speed by using higher clock speeds with hyper-pipeline...

Page 54 - Subsystem; memory incompatible

3-4 361834-002 Technical Reference Guide Processor/Memory Subsystem 3.3 Memory Subsystem The dx6100 and dc7100 models support PC2700 or PC3200 DDR memory and come standard with PC3200 DIMMs installed. The dx6120 models support PC2-4300 DDR2 memory only. ✎ The DDR SDRAM “PCxxxx” reference designates ...

Page 56 - The SPD address map is shown in Table 3-2.

3-6 361834-002 Technical Reference Guide Processor/Memory Subsystem The SPD address map is shown in Table 3-2. NOTES: [1] Programmed as 128 bytes by the DIMM OEM[2] Must be programmed to 256 bytes.[3] High order bit defines redundant addressing: if set (1), highest order RAS# address must be re-sent...

Page 59 - System Support; PCI Bus Overview; These systems implement the following types of PCI buses:

Technical Reference Guide 361834-002 4-1 4 System Support 4.1 Introduction This chapter covers subjects dealing with basic system architecture and covers the following topics: ■ PCI bus overview (4.2), page 4-1 ■ System resources (4.3), page 4-11 ■ Real-time clock and configuration memory (4.4), pag...

Page 60 - Figure 4-1. PCI Bus Devices and Functions; I/O and Memory Cycles

4-2 361834-002 Technical Reference Guide System Support Figure 4-1. PCI Bus Devices and Functions 4.2.1 PCI 2.3 Bus Operation The PCI 2.3 bus consists of a 32-bit path (AD31-00 lines) that uses a multiplexed scheme for handling both address and data transfers. A bus transaction consists of an addres...

Page 61 - Configuration Cycles; PCI Configuration Data Register

Technical Reference Guide 361834-002 4-3 System Support Configuration Cycles Devices on the PCI bus must comply with PCI protocol that allows configuration of that device by software. In this system, configuration mechanism #1 (as described in the PCI Local Bus specification Rev. 2.3) is employed. T...

Page 62 - PCI Component Configuration Access

4-4 361834-002 Technical Reference Guide System Support Table 4-1 shows the standard configuration of device numbers and IDSEL connections for components and slots residing on a PCI 2.3 bus. NOTES:[1] Not used in these systems.[2] SFF, ST, MT, & CMT form factors only.[3] CMT form factor with PCI...

Page 63 - Figure 4-3. PCI Configuration Space Mapping; PCI 2.3 Bus Master Arbitration

Technical Reference Guide 361834-002 4-5 System Support The register index (CF8h, bits <7..2>) identifies the 32-bit location within the configuration space of the PCI device to be accessed. All PCI devices can contain up to 256 bytes of configuration data (Figure 4-3), of which the first 64 b...

Page 64 - Software/driver layer; Software/Driver Layer; PCI Bus Mastering Devices; Device

4-6 361834-002 Technical Reference Guide System Support NOTE:[1]SFF, ST, MT, and CMT form factors only.[2] CMT form factor with PCI expansion board PCI bus arbitration is based on a round-robin scheme that complies with the fairness algorithm specified by the PCI specification. The bus parking polic...

Page 65 - Link Layer; PCI Express Byte Transfer

Technical Reference Guide 361834-002 4-7 System Support Link Layer The link layer provides data integrity by adding a sequence information prefix and a CRC suffix to the packet created by the transaction layer. Flow-control methods ensure that a packet will only be transferred if the receiving devic...

Page 67 - PCI 2.3 Bus Connector Pinout

Technical Reference Guide 361834-002 4-9 System Support 4.2.6 PCI Connectors PCI 2.3 Connector Figure 4-5. PCI 2.3 Bus Connector (32-Bit, 5.0-volt Type) Table 4-5. PCI 2.3 Bus Connector Pinout Pin B Signal A Signal Pin B Signal A Signal Pin B Signal A Signal 01 -12 VDC TRST- 22 GND AD28 43 +3.3 VDC ...

Page 68 - PCI Express Connectors; PCI Express Bus Connector Pinout

4-10 361834-002 Technical Reference Guide System Support PCI Express Connectors Figure 4-6. PCI Express Bus Connectors Table 4-6. PCI Express Bus Connector Pinout Pin B Signal A Signal Pin B Signal A Signal Pin B Signal A Signal 01 +12 VDC PRSNT1# 29 GND PERp3 57 GND PERn9 02 +12 VDC +12 VDC 30 RSVD...

Page 69 - Resources; Maskable Interrupts; APIC mode

Technical Reference Guide 361834-002 4-11 System Support 4.3 System Resources This section describes the availability and basic control of major subsystems, otherwise known as resource allocation or simply “system resources.” System resources are provided on a priority basis through hardware interru...

Page 70 - Maskable Interrupt Priorities and Assignments; Priority Signal

4-12 361834-002 Technical Reference Guide System Support 8259 Mode The 8259 mode handles interrupts IRQ0-IRQ15 in the legacy (AT-system) method using 8259-equivalent logic. Table 4-7 lists the standard source configuration for maskable interrupts and their priorities in 8259 mode. If more than one i...

Page 71 - APIC Mode; Programmable interrupt priority

Technical Reference Guide 361834-002 4-13 System Support APIC Mode The Advanced Programmable Interrupt Controller (APIC) mode provides enhanced interrupt processing with the following advantages: ■ Eliminates the processor's interrupt acknowledge cycle by using a separate (APIC) bus ■ Programmable i...

Page 72 - Non-Maskable Interrupts; Microprocessor internal error (activating IERRA or IERRB); Maskable Interrupt Control Registers; Register

4-14 361834-002 Technical Reference Guide System Support Maskable Interrupt processing is controlled and monitored through standard AT-type I/O-mapped registers. These registers are listed in Table 4-8. The initialization and operation of the interrupt control registers follows standard AT-type prot...

Page 73 - NMI Status Register 61h; Bit

Technical Reference Guide 361834-002 4-15 System Support The NMI Status Register at I/O port 061h contains NMI source and status data as follows: NMI Status Register 61h Functions not related to NMI activity After the active NMI has been processed, status bits <7> or <6> are cleared by p...

Page 74 - LPC DMA; Default DMA Channel Assignments; DMA Channel

4-16 361834-002 Technical Reference Guide System Support 4.3.2 Direct Memory Access Direct Memory Access (DMA) is a method by which a device accesses system memory without involving the microprocessor. Although the DMA method has been traditionally used to transfer blocks of data to or from an ISA I...

Page 75 - DMA Page Registers; The memory address is derived as follows:; DMA Page Register Addresses

Technical Reference Guide 361834-002 4-17 System Support DMA Page Registers The DMA page register contains the eight most significant bits of the 24-bit address and works in conjunction with the DMA controllers to define the complete (24-bit) address for the DMA channels. Table 4-10 lists the page r...

Page 76 - DMA Controller Registers; Register Controller

4-18 361834-002 Technical Reference Guide System Support The remaining address lines are in an undefined state during the refresh cycle. The refresh operations are driven by a 69.799-KHz clock generated by Interval Timer 1, Counter 1. The refresh rate is 128 refresh cycles in 2.038 ms. DMA Controlle...

Page 77 - Real-Time Clock and Configuration Memory; Figure 4 11. Configuration Memory Map; Disconnect the AC power cord from the outlet and/or system unit.; CMOS

Technical Reference Guide 361834-002 4-19 System Support 4.4 Real-Time Clock and Configuration Memory The Real-time clock (RTC) and configuration memory (also referred to as “CMOS”) functions are provided by the 82801 component and is MC146818-compatible. As shown in the following figure, the 82801 ...

Page 78 - With the unit powered down, press and release the power button.

4-20 361834-002 Technical Reference Guide System Support 4.4.2 CMOS Archive and Restore During the boot sequence the BIOS saves a copy of NVRAM (CMOS contents, password(s) and other system variables) in a portion of the flash ROM. Should the system become un-usable, the last good copy of NVRAM data ...

Page 79 - Management; Location Function

Technical Reference Guide 361834-002 4-21 System Support 4.4.3 Standard CMOS Locations Table 4-12 describes standard configuration memory locations 0Ah-3Fh. These locations are accessible through using OUT/IN assembly language instructions using port 70/71h or BIOS function INT15, AX=E823h. NOTES: A...

Page 80 - To clear the password, use the following procedure:; Setup Password; Smart Cover Sensor

4-22 361834-002 Technical Reference Guide System Support Power-On / Setup Password These systems include a power-on and setup passwords, which may be enabled or disabled (cleared) through a jumper on the system board. The jumper controls a GPIO input to the 82801 ICH6 that is checked during POST. Th...

Page 81 - Level 0—; cleared and no other action is taken by BIOS.; Level 1; system start up” is displayed and time stamp in CMOS is updated.; Level 2; System Wakes From

Technical Reference Guide 361834-002 4-23 System Support Level 0— Cover removal indication is essentially disabled at this level. During POST, status bit is cleared and no other action is taken by BIOS. Level 1 —During POST the message “The computer's cover has been removed since the last system sta...

Page 82 - PS/2 Keyboard System Boot/ROM Flash Status LED Indications

4-24 361834-002 Technical Reference Guide System Support 4.5.3 System Status These systems provide a visual indication of system boot and ROM flash status through the keyboard LEDs and operational status using bi-colored power and hard drive activity LEDs as indicated in Tables 4-13 and 4-14 respect...

Page 84 - Register Map and Miscellaneous Functions

4-26 361834-002 Technical Reference Guide System Support 4.6 Register Map and Miscellaneous Functions This section contains the system I/O map and information on general-purpose functions of the ICH6 and I/O controller. 4.6.1 System I/O Map Table 4-15 lists the fixed addresses of the input/output (I...

Page 85 - LPC47B397 I/O Controller Control Registers; Index

Technical Reference Guide 361834-002 4-27 System Support 4.6.2 LPC47B397 I/O Controller Functions The LPC47B397 I/O controller contains various functions such as the keyboard/mouse interfaces, diskette interface, serial interfaces, and parallel interface. While the control of these interfaces uses s...

Page 86 - Writing AAh to 2Eh deactivates the configuration phase.

4-28 361834-002 Technical Reference Guide System Support The configuration registers are accessed through I/O registers 2Eh (index) and 2Fh (data) after the configuration phase has been activated by writing 55h to I/O port 2Eh. The desired interface (logical device) is initiated by firmware selectin...

Page 87 - Input/Output Interfaces; Interfaces; IDE Programming

Technical Reference Guide 361834-002 5-1 5 Input/Output Interfaces 5.1 Introduction This chapter describes the standard (i.e., system board) interfaces that provide input and output (I/O) porting of data and specifically discusses interfaces that are controlled through I/O-mapped registers. The foll...

Page 88 - IDE Configuration Registers

5-2 361834-002 Technical Reference Guide Input/Output Interfaces IDE Configuration Registers The IDE controller is configured as a PCI device with bus mastering capability. The PCI configuration registers for the IDE controller function (PCI device #31, function #1) are listed in Table 5-1. NOTE:[1]...

Page 89 - IDE Bus Master Control Registers

Technical Reference Guide 361834-002 5-3 Input/Output Interfaces IDE Bus Master Control Registers The IDE interface can perform PCI bus master operations using the registers listed in Table 5-2. These registers occupy 16 bytes of variable I/O space set by software and indicated by PCI configuration ...

Page 91 - SATA Interfaces; Reduced wiring (smaller cable assemblies); SATA Programming; SATA Configuration Registers

Technical Reference Guide 361834-002 5-5 Input/Output Interfaces SATA Interfaces These systems provide one, two, or four serial ATA (SATA) interfaces that can provide certain advantages over legacy EIDE (PATA) interface including: ■ Higher transfer rates: up to 1.5 Gb/s (150 MB/s) ■ Reduced wiring (...

Page 92 - SATA Bus Master Control Registers; SATA Connector; The 7-pin SATA connector is shown in the figure below.

5-6 361834-002 Technical Reference Guide Input/Output Interfaces SATA Bus Master Control Registers The SATA interface can perform PCI bus master operations using the registers listed in Table 5-5. These registers occupy 16 bytes of variable I/O space set by software and indicated by PCI configuratio...

Page 93 - Drive; Execution phase—The controller carries out the command.; Diskette Drive Interface Configuration

Technical Reference Guide 361834-002 5-7 Input/Output Interfaces 5.3 Diskette Drive Interface The diskette drive interface in these systems support one diskette drive connected to a standard 34-pin diskette drive connector. Selected models come standard with a 3.5-inch 1.44-MB diskette drive install...

Page 94 - Diskette Drive Interface Configuration Registers

5-8 361834-002 Technical Reference Guide Input/Output Interfaces For detailed configuration register information refer to the SMSC data sheet for the LPC47B397 I/O component. Table 5-7. Diskette Drive Interface Configuration Registers Index Address Function R/W Reset Value 30h Activate R/W 01h 60-61...

Page 95 - Diskette Drive Interface Control; Diskette Drive Interface Control Registers; Address Register

Technical Reference Guide 361834-002 5-9 Input/Output Interfaces Diskette Drive Interface Control The BIOS function INT 13 provides basic control of the diskette drive interface. The diskette drive interface can be controlled by software through the LPC47B397's I/O-mapped registers listed in Table 5...

Page 97 - 4-Pin Diskette Drive Connector Pinout

Technical Reference Guide 361834-002 5-11 Input/Output Interfaces 5.3.2 Diskette Drive Connector This system uses a standard 34-pin connector (refer to Figure 5-3 and Table 5-9 for the pinout) for diskette drives. Drive power is supplied through a separate connector. Figure 5-3. 34-Pin Diskette Driv...

Page 98 - Interface; Serial Interface Configuration; DB-9 Serial Connector Pinout

5-12 361834-002 Technical Reference Guide Input/Output Interfaces 5.4 Serial Interface Systems covered in this guide may include one RS-232-C type serial interface to transmit and receive asynchronous serial data with external devices. Some systems may allow the installation of a second serial inter...

Page 99 - Serial Interface Control; Serial Interface Configuration Registers; Index Address; Serial Interface Control Registers

Technical Reference Guide 361834-002 5-13 Input/Output Interfaces The serial interface configuration registers are listed in the following table: Serial Interface Control The BIOS function INT 14 provides basic control of the serial interface. The serial interface can be directly controlled by softw...

Page 100 - signal (through the Printer Control register) for at least 500 ns.

5-14 361834-002 Technical Reference Guide Input/Output Interfaces 5.5 Parallel Interface Systems covered in this guide may include a parallel interface for connection to a peripheral device with a compatible interface, the most common being a printer. The parallel interface function is integrated in...

Page 101 - Parallel Interface Configuration; Parallel Interface Configuration Registers

Technical Reference Guide 361834-002 5-15 Input/Output Interfaces 5.5.3 Extended Capabilities Port Mode The Extended Capabilities Port (ECP) mode, like EPP, also uses a hardware protocol-based design that supports transfers up to 2 MB/s. Automatic generation of addresses and strobes as well as Run L...

Page 102 - Parallel Interface Control; Parallel Interface Control Registers

5-16 361834-002 Technical Reference Guide Input/Output Interfaces Parallel Interface Control The BIOS function INT 17 provides simplified control of the parallel interface. Basic functions such as initialization, character printing, and printer status are provide by subfunctions of INT 17. The paral...

Page 103 - DB-25 Parallel Connector Pinout

Technical Reference Guide 361834-002 5-17 Input/Output Interfaces 5.5.5 Parallel Interface Connector Figure 5-5 and Table 5-15 show the connector and pinout of the parallel interface connector. Note that some signals are redefined depending on the port's operational mode. Figure 5-5. Parallel Interf...

Page 105 - Command

Technical Reference Guide 361834-002 5-19 Input/Output Interfaces Table 5-16 lists and describes commands that can be issued by the 8042 to the keyboard. Table 5-16. 8042-To-Keyboard Commands Command Value Description Set/Reset Status Indicators EDh Enables LED indicators. Value EDh is followed by a...

Page 106 - Pointing Device Interface Operating

5-20 361834-002 Technical Reference Guide Input/Output Interfaces Note: [1] Used in Mode 3 only. 5.6.2 Pointing Device Interface Operating The pointing device (typically a mouse) connects to a 6-pin DIN-type connector that is identical to the keyboard connector both physically and electrically. The ...

Page 107 - Output buffer reads; Keyboard Interface Configuration Registers

Technical Reference Guide 361834-002 5-21 Input/Output Interfaces The keyboard interface configuration registers are listed in the following table: 8042 Control The BIOS function INT 16 is typically used for controlling interaction with the keyboard. Sub-functions of INT 16 conduct the basic routine...

Page 108 - Value

5-22 361834-002 Technical Reference Guide Input/Output Interfaces I/O Port 64h I/O port 64h is used for reading the status register and for writing commands. A read of 64h by the CPU will yield the status byte defined as follows: A CPU write to I/O port 64h places a command value into the input buff...

Page 110 - Keyboard/Pointing Device Connector Pinout

5-24 361834-002 Technical Reference Guide Input/Output Interfaces 5.6.4 Keyboard/Pointing Device Interface Connector The legacy-light model provides separate PS/2 connectors for the keyboard and pointing device. Both connectors are identical both physically and electrically. Figure 5-7 and Table 5-1...

Page 111 - Universal Serial Bus Interface

Technical Reference Guide 361834-002 5-25 Input/Output Interfaces 5.7 Universal Serial Bus Interface The Universal Serial Bus (USB) interface provides asynchronous/isochronous data transfers with compatible peripherals such as keyboards, printers, or modems. This high-speed interface supports hot-pl...

Page 113 - USB Configuration; USB Interface Configuration Registers

Technical Reference Guide 361834-002 5-27 Input/Output Interfaces 5.7.2 USB Programming Programming the USB interface consists of configuration, which typically occurs during POST, and control, which occurs at runtime. USB Configuration Each USB controller functions as a PCI device within the 82801 ...

Page 114 - USB Control; The USB is controlled through I/O registers as listed in table 5-21.; USB Control Registers

5-28 361834-002 Technical Reference Guide Input/Output Interfaces USB Control The USB is controlled through I/O registers as listed in table 5-21. 5.7.3 USB Connector These systems provide type-A USB ports as shown in Figure 5-10 below. Figure 5-10. Universal Serial Bus Connector (Female) Table 5-21...

Page 115 - USB Cable Length Data

Technical Reference Guide 361834-002 5-29 Input/Output Interfaces 5.7.4 USB Cable Data The recommended cable length between the host and the USB device should be no longer than sixteen feet for full-channel (12 MB/s) operation, depending on cable specification (see following table). NOTE:For sub-cha...

Page 116 - Mic In; Figure 5-11. Audio Subsystem Functional Block Diagram

5-30 361834-002 Technical Reference Guide Input/Output Interfaces 5.8 Audio Subsystem A block diagram of the audio subsystem is shown in Figure 5-11. These systems use the AC97 Audio Controller of the 82801 component to access and control an Analog Devices AD1981B Audio Codec, which provides the ana...

Page 117 - Read/write access to audio codec registers

Technical Reference Guide 361834-002 5-31 Input/Output Interfaces 5.8.1 AC97 Audio Controller The AC97 Audio Controller is a PCI device that is integrated into the 82801 ICH component and supports the following functions: ■ Read/write access to audio codec registers ■ 16-bit stereo PCM output @ up t...

Page 118 - Figure 5-13. AD1981B Audio Codec Functional Block Diagram

5-32 361834-002 Technical Reference Guide Input/Output Interfaces 5.8.3 Audio Codec The audio codec provides pulse code modulation (PCM) coding and decoding of audio information as well as the selection and/or mixing of analog channels. As shown in Figure 5-13, analog audio from a microphone, tape, ...

Page 119 - Audio Configuration; AC97 Audio Controller

Technical Reference Guide 361834-002 5-33 Input/Output Interfaces 5.8.4 Audio Programming Audio subsystem programming consists configuration, typically accomplished during POST, and control, which occurs during runtime. Audio Configuration The audio subsystem is configured according to PCI protocol ...

Page 120 - Audio Control; AC97 Audio Codec Control Registers

5-34 361834-002 Technical Reference Guide Input/Output Interfaces Audio Control The audio subsystem is controlled through a set of indexed registers that physically reside in the audio codec . The register addresses are decoded by the audio controller and forwarded to the audio codec over the AC97 L...

Page 121 - AC97 Audio Subsystem Specifications

Technical Reference Guide 361834-002 5-35 Input/Output Interfaces 5.8.5 Audio Specifications The specifications for the integrated AC97 audio subsystem are listed in Table 5-26. Table 5-26. AC97 Audio Subsystem Specifications Parameter Measurement Sampling Rate 7040 KHz to 48 KHz Resolution 16 bit N...

Page 122 - Figure 5 14. Network Interface Controller Block Diagram; Dual high speed RISC controllers with 16-KB caches.

5-36 361834-002 Technical Reference Guide Input/Output Interfaces 5.9 Network Interface Controller These systems provide 10/100/1000 Mbps network support through a Broadcom BCM5751 network interface controller (NIC), a PHY component, and a RJ-45 jack with integral status LEDs. The 82562-equivalent c...

Page 123 - Alert messages sent by the client to the management console.

Technical Reference Guide 361834-002 5-37 Input/Output Interfaces 5.9.1 Wake-On-LAN Support The NIC supports the Wired-for-Management (WfM) standard of Wake-On-LAN (WOL) that allows the system to be booted up from a powered-down or low-power condition upon the detection of special packets received o...

Page 125 - NIC Specifications

Technical Reference Guide 361834-002 5-39 Input/Output Interfaces 5.9.6 NIC Specifications Table 5-27. NIC Specifications Parameter Modes Supported 10BASE-T half duplex @ 10 Mb/s10Base-T full duplex @ 20 Mb/s100BASE-TX half duplex @ 100 Mb/s100Base-TX full duplex @ 200 Mb/s1000BASE-T half duplex @ 1...

Page 127 - Integrated Graphics Subsystem; This chapter covers the following subjects:

Technical Reference Guide 361834-002 6-1 6 Integrated Graphics Subsystem 6.1 Introduction This chapter describes graphics subsystem that is integrated into the 82915G/GV GMCH component. This graphics subsystem employs the use of system memory to provide efficient, economical 2D and 3D performance. T...

Page 129 - One progressive-scan analog monitor

Technical Reference Guide 361834-002 6-3 Integrated Graphics Subsystem The graphics controller integrated into the 82915G/GV GMCH component includes 2D and 3D accelerator engines working with a deeply-pipelined pre-processor. Hardware cursor and overlay generators are also included as well as a lega...

Page 130 - SDRAM Installed

6-4 361834-002 Technical Reference Guide Integrated Graphics Subsystem 6.2.1 Video Memory Allocation Reporting The IGC does not have local memory at its disposal but instead uses a portion of system memory allocated for frame buffering and texturing. The total memory allocation is determined by the ...

Page 131 - Modes

Technical Reference Guide 361834-002 6-5 Integrated Graphics Subsystem 6.3 Display Modes The IGC supports most standard display modes for 2D video displays up to and including 2048 x 1536 @ 85 Hz , and 3D display modes up to 1600 x 1200 @ 85 Hz. The highest resolution available will be determined by...

Page 132 - Monitor; DB-15 Monitor Connector Pinout

6-6 361834-002 Technical Reference Guide Integrated Graphics Subsystem 6.5 VGA Monitor Connector These systems includes a standard VGA connector (Figure 6-3) for attaching an analog monitor: Figure 6 3. VGA Monitor Connector, (Female DB-15, as viewed from rear). NOTES:[1] Fuse automatically resets w...

Page 133 - Power and Signal Distribution

Technical Reference Guide 361834-002 7-1 7 Power and Signal Distribution 7.1 Introduction This chapter describes the power supply and method of general power and signal distribution. Topics covered in this chapter include: ■ Power supply assembly/control (7.2), page 7-1 ■ Power distribution (7.3), p...

Page 136 - Power Button; System State; Pressed Power Button Results In:

7-4 361834-002 Technical Reference Guide Power and Signal Distribution 7.2.2 Power Control The power supply assembly is controlled digitally by the PS On signal (Figure 7-1). When PS On is asserted, the Power Supply Assembly is activated and all voltage outputs are produced. When PS On is de-asserte...

Page 137 - Power LED Indications; Power LED; less

Technical Reference Guide 361834-002 7-5 Power and Signal Distribution Power LED Indications A dual-color LED located on the front panel (bezel) is used to indicate system power status. The front panel (bezel) power LED provides a visual indication of key system conditions listed as follows: NOTE:[1...

Page 138 - The wake up sequence for each event occurs as follows:; Modem Ring

7-6 361834-002 Technical Reference Guide Power and Signal Distribution The wake up sequence for each event occurs as follows: Wake-On-LAN The network interface controller (NIC) can be configured for detection of a “Magic Packet” and wake the system up from sleep mode through the assertion of the PME...

Page 139 - Table 7-5 shows the comparison in power states.; System Power States; Power

Technical Reference Guide 361834-002 7-7 Power and Signal Distribution 7.2.3 Power Management These systems include power management functions designed to conserve energy. These functions are provided by a combination of hardware, firmware (BIOS) and software. The system provides the following power...

Page 140 - Distribution

7-8 361834-002 Technical Reference Guide Power and Signal Distribution 7.3 Power Distribution 7.3.1 3.3/5/12 VDC Distribution The power supply assembly includes a multi-connector cable assembly that routes +3.3 VDC, +5 VDC, +5 VDC STB, +12 VC, and -12 VDC to the system board as well as to the indivi...

Page 141 - Figure 7-3 shows the power supply cabling for the SFF/ST systems.

Technical Reference Guide 361834-002 7-9 Power and Signal Distribution Figure 7-3 shows the power supply cabling for the SFF/ST systems. Connectors not shown to scale.All + and - values are VDC.RTN = Return (signal ground)sns = senseGND = Power groundRS = Remote senseFC = Fan commandFO = Fan offFSpd...

Page 144 - Figure 7-6. Low Voltage Supply and Distribution Diagram

7-12 361834-002 Technical Reference Guide Power and Signal Distribution 7.3.2 Low Voltage Production/Distribution Auxiliary voltages less than 5 volts and all voltages less than 3.3 volts are produced through regulator circuitry (Figure 7-6) on the system board. Figure 7-6. Low Voltage Supply and Di...

Page 145 - Figure 7-7. USDT Form Factor Signal Distribution Diagram

Technical Reference Guide 361834-002 7-13 Power and Signal Distribution 7.4 Signal Distribution Figures 7-7 through 7-9 show general signal distribution between the main subassemblies of the system units. NOTES:See Figure 7-10 for header pinout. Figure 7-7. USDT Form Factor Signal Distribution Diagr...

Page 148 - CD ROM Audio Header

7-16 361834-002 Technical Reference Guide Power and Signal Distribution NOTE: No polarity consideration required for connection to speaker header P6. Figure 7-10. Header Pinouts CD ROM Audio Header 1 Audio (Left Channel) 3 Ground 4 Audio (right channel) 2 Ground CD ROM Audio Headers P7, P11 UART1 RX...

Page 149 - BIOS ROM

Technical Reference Guide 361834-002 8-1 8 BIOS ROM 8.1 Introduction The Basic Input/Output System (BIOS) of the computer is a collection of machine language programs stored as firmware in read-only memory (ROM). The BIOS ROM includes such functions as Power-On Self Test (POST), PCI device initializ...

Page 150 - Flashing; Boot Block Codes; Num Lock LED

8-2 361834-002 Technical Reference Guide BIOS ROM This chapter includes the following topics: ■ ROM flashing (8.2), page 8-2 ■ Boot functions (8.3), page 8-3 ■ Setup utility (8.4) , page 8-6 ■ Client management functions (8.5), page 8-17 ■ PnP support (8.6) , page 8-19 ■ USB legacy support (8.7), pa...

Page 151 - The splash screen image requirements are as follows:; Functions; The default boot device order is as follows:

Technical Reference Guide 361834-002 8-3 BIOS ROM 8.2.2 Changeable Splash Screen ✎ A corrupted splash screen may be restored by the user with the ROMPAQ software. Depending on the system, changing (customizing) the splash screen may only be available with asistance from HP. The splash screen (image ...

Page 152 - Installing an application.

8-4 361834-002 Technical Reference Guide BIOS ROM 8.3.2 Network Boot (F12) Support The BIOS supports booting the system to a network server. The function is accessed by pressing the F12 key when prompted at the lower right hand corner of the display during POST. Booting to a network server allows fo...

Page 153 - Boot Error Codes; Audible

Technical Reference Guide 361834-002 8-5 BIOS ROM 8.3.4 Boot Error Codes The BIOS provides visual and audible indications of a failed system boot by using the LEDS on the PS/2 keyboard and the system board speaker. The error conditions are listed in the following table. NOTE:[1] Provided with PS/2 k...

Page 154 - Utility; utility are described in the following table.

8-6 361834-002 Technical Reference Guide BIOS ROM 8.4 Setup Utility The Setup utility (stored in ROM) allows the user to configure system functions involving security, power management, and system resources. The Setup utility is ROM-based and invoked when the F10 key is pressed and held during the c...

Page 156 - Storage Options

8-8 361834-002 Technical Reference Guide BIOS ROM Translation Parameters (ATA disks only) ✎ This feature appears only when User translation mode is selected. Allows you to specify the parameters (logical cylinders, heads, and sectors per track) used by the BIOS to translate disk I/O requests (from t...

Page 157 - Troubleshooting Guide

Technical Reference Guide 361834-002 8-9 BIOS ROM Secondary SATA Controller Allows you to enable or disable the Secondary SATA controller. This feature is supported on select models only. DPS Self-Test Allows you to execute self-tests on ATA hard drives capable of performing the Drive Protection Sys...

Page 158 - Setup Utility

8-10 361834-002 Technical Reference Guide BIOS ROM Smart Cover Allows you to: • Lock/unlock the Cover Lock.• Set the Cover Removal Sensor to Disable/Notify User/Setup Password. ✎ Notify User alerts the user that the sensor has detected that the cover has been removed. Setup Password requires that th...

Page 159 - DriveLock Security

Technical Reference Guide 361834-002 8-11 BIOS ROM DriveLock Security Allows you to assign or modify a master or user password for MultiBay hard drives. When this feature is enabled, the user is prompted to provide one of the DriveLock passwords during POST. If neither is successfully entered, the h...

Page 162 - Onboard Devices

8-14 361834-002 Technical Reference Guide BIOS ROM Advanced* (continued) *For advanced users only Power-On Options (continued) Allows you to set: (continued) • ACPI/USB Buffers @ Top of Memory (enable/disable). Enabling this feature places USB memory buffers at the top of memory. The advantage is th...

Page 163 - Device options; Num Lock; Advanced; Security; blink pattern that uniquely identifies each sleep state.

Technical Reference Guide 361834-002 8-15 BIOS ROM Advanced* (continued) *For advanced users only Device options Allows you to set: • Printer mode (bi-directional, EPP & ECP, output only).• Num Lock state at power-on (off/on). • S5 Wake on LAN (enable/disable). • To disable Wake on LAN during th...

Page 164 - Client Management Functions; AX

8-16 361834-002 Technical Reference Guide BIOS ROM 8.5 Client Management Functions Table 8-4 provides a partial list of the client management BIOS functions supported by the systems covered in this guide. These functions, designed to support intelligent manageability applications, are Compaq-specifi...

Page 165 - 720-SMART Hard Drive detects imminent failure; System ID

Technical Reference Guide 361834-002 8-17 BIOS ROM 8.5.1 System ID and ROM Type Diagnostic applications can use the INT 15, AX=E800h BIOS function to identify the type of system. This function will return the system ID in the BX register. systems have the following IDs and ROM family types: NOTE: Al...

Page 166 - Support; PnP BIOS Functions

8-18 361834-002 Technical Reference Guide BIOS ROM 8.6 PnP Support The BIOS includes Plug 'n Play (PnP) support for PnP version 1.0A. Table 8-6 lists the PnP functions supported. The BIOS call INT 15, AX=E841h, BH=01h can be used by an application to retrieve the default settings of PnP devices for ...

Page 167 - USB Legacy Support; Type

Technical Reference Guide 361834-002 8-19 BIOS ROM 8.6.1 SMBIOS In support of the DMI specification the PnP functions 50h and 51h are used to retrieve the SMBIOS data. Function 50h retrieves the number of structures, size of the largest structure, and SMBIOS version. Function 51h retrieves a specifi...

Page 169 - Error Messages and Codes; Beep/Keyboard LED Codes; Beeps

Technical Reference Guide 361834-002 A-1 A Error Messages and Codes A.1 Introduction This appendix lists the error codes and a brief description of the probable cause of the error. ✎ Errors listed in this appendix are applicable only for systems running HP/Compaq BIOS. Not all errors listed in this ...

Page 170 - Error Message

A-2 361834-002 Technical Reference Guide Error Messages and Codes A.3 Power-On Self Test (POST) Messages Table A-2. Power-On Self Test (POST) Messages Error Message Probable Cause Invalid Electronic Serial Number Chassis serial number is corrupt. Use Setup to enter a valid number. Network Server Mod...

Page 171 - For integrated MultiBay/ USDT systems

Technical Reference Guide 361834-002 A-3 Error Messages and Codes 512-Chassis Fan Not Detected Chassis fan is not connected. 514-CPU or Chassis Fan not detected. CPU fan is not connected or may have malfunctioned. 601-Diskette Controller Error Diskette drive removed since previous boot. 605-Diskette...

Page 172 - Parity Check 2

A-4 361834-002 Technical Reference Guide Error Messages and Codes 1794-Inaccessible devices attached to SATA 1 and/or SATA 3 (for systems with 4 SATA ports) A device is attached to SATA 1 and/or SATA 3.Devices attached to these connectors will be inaccessible while “SATA Emulation” is set to “Combin...

Page 174 - Memory Error Messages

A-6 361834-002 Technical Reference Guide Error Messages and Codes A.5 Memory Error Messages (2xx-xx) Table A-4. Memory Error Messages Message Probable Cause 200-04 Real memory size changed 200-05 Extended memory size changed 200-06 Invalid memory configuration 200-07 Extended memory size changed 200...

Page 177 - Diskette Drive Error Messages

Technical Reference Guide 361834-002 A-9 Error Messages and Codes A.9 Diskette Drive Error Messages (6xx-xx) 600-xx = Diskette drive ID test 609-xx = Diskette drive reset controller test 601-xx = Diskette drive format 610-xx = Diskette drive change line test 602-xx = Diskette read test 611-xx = Pri....

Page 178 - Serial Interface Error Messages

A-10 361834-002 Technical Reference Guide Error Messages and Codes A.10 Serial Interface Error Messages (11xx-xx) Table A-9. Serial Interface Error Messages Message Probable Cause Message Probable Cause 1101-01 UART DLAB bit failure 1101-13 UART cntrl. signal interrupt failure 1101-02 Line input or ...

Page 179 - Modem Communications Error Messages

Technical Reference Guide 361834-002 A-11 Error Messages and Codes A.11 Modem Communications Error Messages (12xx-xx) Table A-10. Modem Communications Error Messages Message Probable Cause Message Probable Cause 1201-XX Modem internal loopback test 1204-03 Data block retry limit reached [4] 1201-01 ...

Page 181 - Hard Drive Error Messages

Technical Reference Guide 361834-002 A-13 Error Messages and Codes A.13 Hard Drive Error Messages (17xx-xx) Table A-12 Hard Drive Error Messages Message Probable Cause Message Probable Cause 17xx-01 Exceeded max. soft error limit 17xx-51 Failed I/O read test 17xx-02 Exceeded max. Hard error limit 17...

Page 186 - SCSI Interface Error Messages

A-18 361834-002 Technical Reference Guide Error Messages and Codes A.19 SCSI Interface Error Messages (65xx-xx, 66xx-xx, 67xx-xx) n = 5, Hard drive = 6, CD-ROM drive = 7, Tape drive yy = 00, ID = 03, Power check = 05, Read = 06, SA/Media = 08, Controller = 23, Random read = 28, Media load/unload Tab...

Page 187 - Pointing Device Interface Error Messages

Technical Reference Guide 361834-002 A-19 Error Messages and Codes A.20 Pointing Device Interface Error Messages (8601-xx) Table A-19 Pointing Device Interface Error Messages Message Probable Cause Message Probable Cause 8601-01 Mouse ID fails 8601-07 Right block not selected 8601-02 Left mouse butt...

Page 189 - ASCII Character Set

Technical Reference Guide 361834-002 B-1 B ASCII Character Set B.1 Introduction This appendix lists, in Table B-1, the 256-character ASCII code set including the decimal and hexadecimal values. All ASCII symbols may be called while in DOS or using standard text-mode editors by using the combination ...

Page 193 - Keyboard; This appendix covers the following keyboard types:; C.2 Keystroke Processing

Technical Reference Guide 361834-002 C-1 C Keyboard C.1 Introduction This appendix describes the HP keyboard that is included as standard with the system unit. The keyboard complies with the industry-standard classification of an “enhanced keyboard” and includes a separate cursor control key cluster...

Page 195 - The enhanced keyboard has three operating modes:

Technical Reference Guide 361834-002 C-3 Keyboard C.2.1 PS/2-Type Keyboard Transmissions The PS/2-type keyboard sends two main types of data to the system; commands (or responses to system commands) and keystroke scan codes. Before the keyboard sends data to the system (specifically, to the 8042-typ...

Page 201 - Default Function

Technical Reference Guide 361834-002 C-9 Keyboard C.2.4.4 Easy Access Keystrokes The Easy Access keyboards(Figures C-7) include additional keys (also referred to as buttons) used to streamline internet access and navigation. These buttons, which can be re-programmed to provide other functions, have ...

Page 203 - Keyboard Scan Codes; Legend

Technical Reference Guide 361834-002 C-11 Keyboard C.2.6 Scan Codes The scan codes generated by the keyboard processor are determined by the mode the keyboard is operating in. ■ Mode 1: In Mode 1 operation, the keyboard generates scan codes compatible with 8088-/8086-based systems. To enter Mode 1, ...

Page 209 - Pin

Technical Reference Guide 361834-002 C-17 Keyboard C.3 Connectors Two types of keyboard interfaces may be used in HP/Compaq systems: PS/2-type and USB-type. System units that provide a PS/2 connector will ship with a PS/2-type keyboard but may also support simultaneous connection of a USB keyboard. ...

Page 211 - Numerics; graphics subsystem 6-1

Technical Reference Guide 361834-002 Index–1 Index Numerics 8259 Mode 4-12 A AC97 Audio Controller 5-31Advanced Digital Display (ADD2) 6-22advanced, Computer Setup heading 7-13APIC Mode 4-13audible (beep) indications 4-24audio codec 32Audio Specifications 5-35 B beep indications 4-24BIOS upgrading 8...

Page 212 - Computer Setup heading 9

Index–2 361834-002 Technical Reference Guide Index S SATA 4-1SATA Connector 4-6SDVO 6-2security Computer Setup heading 9 serial interface 5-12Serial Interface Connector 5-12serial number 1-3Smart Cover Lock 2-23Smart Cover Sensor 2-22SMBIOS 8-19SPD address map 3-6specifications physical 2-32 storage...

HP DX61XX - Manual

Table of Contents:

Summary

Other HP Models