HP 16501A LOGIC - Manual

In This Book This User’s Guide shows you how to use the HP 16500C Logic Analysis System inyour everyday debugging work. Chapter 1, “Triggering,” shows you howto set up the analyzer to trigger on thevarious kinds of events present in yoursystem. Advanced triggering capabilityallows you to look at onl...

about specific application problems and how to solve them using an HP logicanalyzer. See Also For general information on setup and operation of the HP 16500C, see the HP 16500C /16501A Logic Analysis System User’s Reference . For information on programming the HP 16500C using a computer controllersu...

Contents 1 Triggering To store and time the execution of a subroutine 1–3To trigger on the nth iteration of a loop 1–5To trigger on the nth recursive call of a recursive function 1–6To trigger on entry to a function 1–8To capture a write of known bad data to a particular variable 1–10To trigger on a...

To capture state flow showing how your target system processes an interrupt 2–16 To test a circuit using stimulus-response 2–17To use a state analyzer to trigger timing analysis of a count-down on a set of data lines 2–18 To monitor the activity of two coprocessors in a target system 2–19 Special di...

4 Concepts The Trigger Sequencer 4–3 The Inverse Assembler 4–10 Configuration Translation for Analyzer Modules 4–13 5 If You Have a Problem Analyzer Problems 5–3 Intermittent data errors 5–3Unwanted triggers 5–3No Setup/Hold field on format screen 5–4No activity on activity indicators 5–4Capacitive ...

Triggering As you begin to understand a problem in your system, you may realizethat certain conditions must occur before the problem occurs. Youcan use sequential triggering to ensure that those conditions haveoccurred before the analyzer recognizes its trigger and capturesinformation. You set up se...

To store and time the execution of a subroutine Most systems software of any kind is composed of a hierarchy of functionsand procedures. During integration, testing, and performance evaluation, youwill want to look at specific procedures to verify that they are executingcorrectly and that the implem...

Example Suppose you want to trigger on entry to a routine called MY_SUB. You candefine the address of MY_SUB in the Format menu, allowing you to referencethe symbol name when setting up the trace specification. Assume thatMY_SUB extends for 0A hex locations. You can set up the trigger sequenceras sh...

To trigger on the nth iteration of a loop Traditional debugging requires print statements around the area of interest.This is not possible in most embedded systems designs. But, the analyzerallows you to view the system’s behavior when a particular event occurs.Suppose that your system behaves incor...

To trigger on the nth recursive call of a recursivefunction 1 Select the state analyzer Trigger menu. 2 Define the terms CALL_ADD, F_START, and F_END to represent thecalled address of the recursive function, and the start and endaddresses of the function. Define F_EXIT to represent the address ofthe...

To trigger on entry to a function This sequence triggers on entry to a function only when it is called by oneparticular function. 1 Select the state analyzer Trigger menu. 2 Define the terms F1_START and F1_END to represent the start andend addresses of the calling function. Define F2_START to repre...

To capture a write of known bad data to a particularvariable The trigger specification ANDs the bad data on the data bus, writetransaction on the status bus, and address of the variable on the address bus. 1 Select the state analyzer Trigger menu. 2 Define the terms BAD_DATA, WRITE, and VAR_ADDR to ...

To trigger on a loop that occasionally runs too long This example assumes the loop normally executes in 14 µ s. 1 Select the state analyzer Trigger menu. 2 Define terms LP_START, LP_END, and Timer1 to represent the startand end addresses of the loop, and the normal duration of the loop. You can make...

To trigger after all status bus lines finish transitioning In some applications, you will want to trigger a measurement when aparticular pattern has become stable. For example, you might want to triggerthe analyzer when a microprocessor’s status bus has become stable duringthe bus cycle. 1 Select th...

To find the nth assertion of a chip select line 1 Select the timing analyzer Trigger menu. 2 Define the glitch/edge1 term to represent the asserting transition onthe chip select line. You can rename the Edge1 term to make it correspond more closely to theproblem domain, for example, to CHIP_SEL. 3 U...

To verify that the chip select line of a memory chip isstrobed after the address is stable 1 Select the timing analyzer Trigger menu. 2 Define a term called ADDRESS to represent the address in questionand the Edge1 term to represent the asserting transition on the chipselect line. You can rename the...

To trigger when expected data does not appear on thedata bus from a remote device when requested 1 Select the timing analyzer Trigger menu. 2 Define a term called DATA to represent the expected data, the Edge1term to represent the chip select line of the remote device, and theTimer1 term to identify...

To test minimum and maximum pulse limits 1 Select the timing analyzer Trigger menu. 2 Define the Edge1 term to represent the positive-going transition, anddefine the Edge2 term to represent the negative-going transition onthe line with the pulse to be tested. You can rename these terms to POS_EDGE a...

To detect a handshake violation 1 Select the timing analyzer Trigger menu. 2 Define the Edge1 term to represent either transition on the firsthandshake line, and the Edge2 term to represent either transition onthe second handshake line. You can rename these terms to match your problem, for example, ...

To detect bus contention In this sequencer setup, the trigger occurs only if both devices assert theirbus transfer acknowledge lines at the same time. 1 Select the timing analyzer Trigger menu. 2 Define the Edge1 term to represent assertion of the bus transferacknowledge line of one device, and Edge...

Cross-Arming Trigger Examples The following examples use cross arming to coordinate measurementsbetween two instruments. The cross-arming is set up in the ArmingControl menu (obtained by selecting Arming Control in the Triggermenu). When coordinating measurements between two or moreanalyzers, select...

To examine software execution when a timingviolation occurs The timing analyzer triggers when the timing violation occurs, and when ittriggers, it also sets its “arm” level to true. When the state analyzer receivesthe arm signal, it triggers immediately on the present state. 1 Select the timing anal...

To look at control and status signals during executionof a routine The state analyzer will trigger on the start of the routine whose control andstatus signals are to be examined with finer resolution than once per buscycle. When it triggers, it will switch its “arm” level true. The timing analyzerwi...

Intermodule Measurement Examples To set up an intermodule measurement, you must use theIntermodule menu. All modules that will participate in theintermodule measurement must be represented in this menu and theirrelationships must be shown under the Group Run field. To set up a group run of modules w...

Oscilloscope Arms State Analyzer in Group Run The analyzer in slotB is armed whenthe oscilloscope inslot D finds itstrigger condition. Intermodule Measurements To set up a group run of modules within the HP 16500C 2–5

To start a group run of modules from an externaltrigger source 1 Connect the arm signal from the external instrument or system to thePORT IN BNC connector on the rear panel of the HP 16500 frame. 2 Select the Intermodule menu. 3 Set up the group run specification. 4 Select the PORT IN/OUT field. a S...

To start an external instrument on command from amodule within the HP 16500 and 16501 mainframe You can set up a module in a group run so that it sends a pulse through thePORT OUT rear panel BNC. The pulse can be used to start or stop ameasurement in an external instrument or system. 1 Set up the gr...

To see the status of a module within an intermodulemeasurement 1 Select the Intermodule menu. 2 Find the name of the module under the “Modules” list, and read thestatus under the module name. The status can be either Running or Stopped. You can interpret theseindications as follows: • If a module wa...

To use a timing analyzer to detect a glitch The following setup uses a state analyzer to capture state flow occurring atthe time of the glitch. This can be useful in troubleshooting. For example, youmight find that the glitch is ground bounce caused by a number ofsimultaneous signal transitions. 1 S...

To capture the waveform of a glitch The following setup uses the triggering capability of the timing analyzer andthe acquisition capability of the oscilloscope. 1 Select the Intermodule Menu. 2 Select the timing analyzer from the Modules list and set it to GroupRun. Select the oscilloscope module an...

To capture state flow showing how your target systemprocesses an interrupt Use an oscilloscope with a sample rate faster than the microprocessor clockrate to trigger on the asynchronous interrupt request. 1 Select the Intermodule menu. 2 Select the oscilloscope from the Modules list and set it to Gr...

To test a circuit using stimulus-response 1 Select the Intermodule menu. 2 Select the pattern generator from the Modules list and set it to GroupRun. Select the oscilloscope module and set it to respond to the armsignal from the pattern generator. Select the state analyzer and set itto respond to th...

To monitor the activity of two coprocessors in a targetsystem Debugging coprocessor systems can be a complex task. Replicated systemsand contention for shared resources increase the potential problems. Usingtwo state analyzers with preprocessors can make it much easier to discoverthe source of such ...

7 Select Group Run from the upper right corner of the display. After the measurement is complete, you can interleave the trace lists of bothstate analyzers to see the activity executed by both coprocessors duringrelated clock cycles. You can use a similar procedure if you have only one processor, bu...

Special displays Interleaved Trace Lists Interleaved trace lists allow you to view data captured by two or moreanalyzers in a single trace list. When you interleave the traces, you seeeach state that was captured by each analyzer. These states areshown on consecutive lines. You can interleave state ...

To interleave trace lists 1 Set up the analyzers whose data you wish to interleave as part of agroup run. You won’t need to do this if the two measurement modules for which youwant mixed display are really part of the same module. For example, youmight have an HP 16550A state/timing analyzer configu...

Interleaved Trace Lists on the HP 16550A See Also “To set up a group run of modules within the HP 16500C” in this chapter. Labels for theinterleaved states areshown above those forthe primary analyzer. Interleaved statesare shown in yellowwith line numbersindented from thoseof the primaryanalyzer. I...

To view trace lists and waveforms together on thesame display 1 Set up the modules whose data you wish to view as part of a grouprun. You won’t need to do this if the two measurement modules for which youwant mixed display are really part of the same module. For example, youmight have an HP 16550A s...

Skew Adjustment You can modify the skew or timing deviation between modules withinthe intermodule measurement. This allows you to compensate for anyknown delay of the system under test, or to compare two signals byfirst removing any displayed skew between the signal channels. Skew adjustments can co...

8 Record the differences shown by the two modules. You can use the X and O markers to measure the differences in delays. 9 Select the Intermodule Menu. 10 Select Skew, then enter a skew correction value for one of themodules using the knob or the keyboard. 11 Return to the module waveform display an...

File Management A host computer such as a PC or UNIX workstation can enhance theHP 16500C in many ways. You can use the host to store configurationfiles or measurement results for later review. Screen images from theHP 16500C can be saved in bitmap files for inclusion in reportsdeveloped using word ...

Transferring Files Using the Flexible Disk Drive Because the flexible disk drive on the HP 16500C will read and writedouble-sided, double density or high-density disks in MS-DOS format,it is a useful tool for transferring images to and from IBMPC-compatible computers as well as other systems that ca...

To save a measurement configuration You can save measurement configurations on a 3.5-inch disk or on theinternal hard disk for later use. This is especially useful for automatingrepetitive measurements for production testing. 1 Select System from the module field. 2 Select Hard Disk or Flexible Disk...

To load a measurement configuration You can quickly load a previously saved measurement configuration, savingthe trouble of manually setting up the measurement parameters for eachmodule. 1 Select System from the module field. 2 Select Hard Disk or Flexible Disk from the Menu field. Your choice here ...

To save a trace list in ASCII format Some HP 16500C displays, such as file lists and trace lists, contain columns ofASCII data that you may want to move to a PC for further manipulation oranalysis. You can save these displays as ASCII files, using a procedure similarto that for creating graphics ima...

To save a menu or measurement as a graphic image You can save menus and measurements to disk in one of four differentgraphics formats. 1 Insert a DOS-formatted flexible disk in the flexible disk drive. 2 Set up the menu whose image you want to capture, or run ameasurement from which you want to save...

To load system software 1 Insert the first disk containing the system software. 2 Select System from the module field. 3 Select Hard Disk from the menu field. 4 Select Change Directory from the disk operation field. 5 Select the directory SYSTEM using the knob, and select Execute. 6 Select Flexible ...

Using the LAN Interface The LAN Interface of the HP 16500C extends the Logic AnalysisSystem by making it look like a NFS (Network File System) node.Using NFS utilities for the PC or NFS on a UNIX workstation, you cantransfer files to and from the HP 16500C as if it were a disk driveattached to your ...

To set up the HP 16500C You can set up the HP 16500C from the front panel, or via the LAN. To set upthe system via the LAN, you can use one of three methods: • Copy a configuration file from your PC or workstation to one of the filescalled setup.raw in the HP 16500C directory tree. • Remotely load a...

Example You want to load a configuration file called “486_bus” from the hard disk ofthe HP 16500C into an HP 16550A state/timing module. The HP 16550A isinstalled in slot B of the HP 16500C mainframe. To load the configuration filefrom the HP 16500C hard disk, you need to send the programming comman...

To transfer data files from the HP 16500C system toyour computer You can transfer data from the HP 16500C system to your PC or workstationby copying files. Data files in binary format are available in file locations \slot_x\data.raw . These binary files can be transferred to your computer and then r...

To transfer graphics files from the HP 16500C systemto your computer The current display of the HP 16500C is available in four different formats. 1 Set up the display you want to transfer. 2 Copy the file in the format of your choice from the directory \system\graphics . • The file screen.tif is a c...

The Trigger Sequencer Logic state and timing analyzer modules for the HP 16500C havetriggering and data storage features that allow you to capture only thesystem activity of interest. Understanding how these features workwill help you set up analyzer trigger specifications that satisfy yourmeasureme...

State Analyzer Sequencer with Four States Each state, except for the last, has two branch conditions. These arethe sequence-advance and sequence-else specification. (Thetrigger-on specification is a special sequence-advance specificationthat is described in the section “TRIGGER On Specification.”) S...

Sequence-Else Specification The sequence-else branch, sometimes called the “else if” branch orsecondary branch, may branch to any other state, including thecurrent state, a previous state, or a later state. The sequence-elsespecification looks like the following: Else on "<TERM>" go to...

you want to capture activity after the trigger is captured, define anadditional sequence level and specify the desired storage qualificationfor post-trigger activity (for example, store “anystate”). Analyzer Resources The sequence-advance, sequence-else, storage, and trigger-onspecifications are set...

Where <TERM> can be a single value on a set of labels, any valuewithin a range of values on a set of labels, or a glitch or edge transitionon a bit or set of bits. Limitations Affecting Use of Analyzer Resources There are limitations on the way resources can be combined to formcomplex pattern ...

The following figure shows the possible combinations of the a, b, c andRange1 terms: Combining a, b, c, and Range1 Terms The following combination is not valid, because pairs cross groupboundaries: ((a+b) + (h • In_Range2)) • (j xor Timer2 > 400 ns) Note that the analyzer interface will not allow...

The Inverse Assembler When the analyzer captures a trace, it captures binary information.The analyzer can then present this information in binary, octal,decimal, hexadecimal, or ASCII. Or, if given information about themeaning of the data captured, the analyzer can inverse assemble the trace. The in...

Configuration Translation for Analyzer Modules Configuration files provide an easy way for you to save and restoremeasurement setups, simplifying repeated measurements. However,sometimes you might change analyzer modules in the HP 16500CLogic Analysis System to gain additional measurement features. ...

If You Have a Problem Occasionally, a measurement may not give the expected results. If youencounter difficulties while making measurements, use this chapter toguide you through some possible solutions. Each heading lists aproblem you may encounter, along with some possible solutions. Errormessages ...

Analyzer Problems This section lists general problems that you might encounter whileusing the analyzer. Intermittent data errors This problem is usually caused by poor connections, incorrect signal levels, ormarginal timing. Remove and reseat all cables and probes; ensure that there are no bentpins ...

No Setup/Hold field on format screen The HP 16540 and 16541 (A and D models), or HP 16542A logic analyzercards are not calibrated. Refer to your logic analyzer reference manual forprocedures to calibrate the cards. No activity on activity indicators On the HP 16510A Logic Analyzer, check the fuse th...

No trace list display If there is no trace list display, it may be that your analysis specification is notcorrect for the data you want to capture, or that the trace memory is onlypartially filled. Check your analysis sequencer specification to ensure that it willcapture the events of interest. Try ...

Preprocessor Problems This section lists problems that you might encounter when using apreprocessor. If the solutions suggested here do not correct theproblem, you may have a defective preprocessor. Refer to the User’s Guide for your preprocessor for test procedures. Contact your local Hewlett-Packa...

Slow clock If you have the preprocessor interface hooked up and running and observe aslow clock or no activity from the interface board, the +5 V supply comingfrom the analyzer may not be getting to the interface board. To check the +5 V supply coming from the analyzer, disconnect one ofthe logic an...

Inverse Assembler Problems This section lists problems that you might encounter while using theinverse assembler. When you obtain incorrect inverse assembly results, it may be unclearwhether the problem is in the preprocessor or in your target system. Ifyou follow the suggestions in this section to ...

Check the activity indicators for status lines locked in a high or lowstate. Verify that the STAT, DATA, and ADDR format labels have not beenmodified from their default values. These labels must remain as they are configured by the configuration file. Donot change the names of these labels or the bi...

Intermodule Measurement Problems Some problems occur only when you are trying to make ameasurement involving multiple modules. An event wasn’t captured by one of the modules If you are trying to capture an event that occurs very shortly after the eventthat arms one of the measurement modules, it may...

Messages This section lists some of the messages that the analyzer displayswhen it encounters a problem. “Default Calibration Factors Loaded” (HP 16540,16541, and 16542) The default calibration file for the logic analyzer was loaded. The logicanalyzer must be calibrated when using HP 16540A/D, HP 16...

“Measurement Initialization Error” This error occurs when you have installed the cables incorrectly for one ortwo HP 16550A logic analysis cards. The following diagrams show the correctcable connections for one-card and two-card installations. Ensure that yourcable connections match the drawing, the...

“No Configuration File Loaded” This is usually caused by trying to load a configuration file for one type ofmodule or the system into a different type of module. Verify that the appropriate module has been selected from the Load{module} from File {filename} in the HP 16500 disk operation menu.Select...

“State Clock Violates Overdrive Specification” At least one 16-channel pod in the state analysis measurement stored adifferent number of states before trigger than the other pods. This is usuallycaused by sending a clocking signal to the state analyzer that does not meetall of the specified conditio...

“Waiting for Trigger” If a trigger pattern is specified, this message indicates that the specifiedtrigger pattern has not occurred. Verify that the triggering pattern iscorrectly set. When analyzing microprocessors that fetch only from long-word alignedaddresses, if the trigger condition is set to l...

Application Notes Hewlett-Packard has prepared several application notes and productnotes that show you how to get more out of your HP 16500C LogicAnalysis System. Each note focuses on a particular application orproblem, showing you the components of the problem, the approachrequired to solve it, th...

Glossary acquisition Denotes one complete cycle of data gathering by a module.For example, in the HP 16532 oscillo-scope, one complete cycle gathers8000 samples of information andstores them in acquisition memory. arm The arm output from a mod- ule is set false when the modulebegins running and is s...

You should adjust measurement mod-ules to eliminate as much skew aspossible so that it does not affect theaccuracy of your measurements. source field In the oscilloscope, the field that allows you to select achannel for edge triggering and trig-ger level setting. state sequence levels The indi- vidu...

trigger Trigger is a reference event around which you want togather information. In the analyzer,you might want to trigger on a glitchin hardware or entry to a subroutinein software. When beginning, youmight want to trigger on the first oc-currence of any kind (trigger on“anystate”). As you learn mo...

-002, etc), and states captured afterthe trigger are numbered with posi-tive numbers (001, 002, etc). vertical position See offset field. V/div See vertical sensitivity vertical sensitivity In the oscillo- scope, the voltage value thatdetermines the amplitude of thewaveform on the screen. It is meas...

Index A Activation record, 1–6Address bus, 4–10Address ranges, 1–3Analyzer concepts, 4–2 Analyzer problems, 5–3 capacitive loading, 5–4intermittent data errors, 5–3no activity on activity indicators, 5–4no setup/hold field on format screen, 5–4unwanted triggers, 5–3 Anystate, 1–5, 2–4, 4–5Arm input,...

N NFS node, 3–13No state, 1–3, 4–5Non-reference channel, 2–26Not, 4–5 O Onscreen keypad, 2–6Output Disk menu, 3–8Output Format field, 3–8 P Pair boundaries, 4–8Pairs, 4–7Pattern expression, 4–7Pattern generators, 2–17Pattern terms, 4–6PC Paintbrush files, 3–10Pipelining add depth to start address, 1...

V Verifying chip select line is strobed, 1–15correct execution, 1–3correct storage, 1–12efficiency, 1–3 Viewing trace lists and waveforms together, 2–25 W Watchdog timer behavior, 2–20Waveforms deleting, 2–27inserting, 2–27viewing with trace lists, 2–25 Index Index–3