Fujitsu MB15F74UL - Manual - manualsarea.com

Page 2 - PIN ASSIGNMENTS

MB15F74UL 2 (Continued) • Direct power saving function : Power supply current in power saving mode Typ 0.1 µ A (V CC = Vp = 3.0 V, Ta = + 25 ° C) Max 10 µ A (V CC = Vp = 3.0 V) • Software selectable charge pump current : 1.5 mA/6.0 mA Typ• Dual modulus prescaler : 4000 MHz prescaler (64/65 or128/129...

Page 3 - PIN DESCRIPTION; Pin

MB15F74UL 3 ■ PIN DESCRIPTION Pin no. Pin name I/O Descriptions 1 fin IF I Prescaler input pin for the IF-PLL.Connection to an external VCO should be AC coupling. 2 Xfin IF I Prescaler complimentary input for the IF-PLL section.This pin should be grounded via a capacitor. 3 GND IF  Ground pin for t...

Page 4 - BLOCK DIAGRAM

MB15F74UL 4 ■ BLOCK DIAGRAM (9) Clock Data LE PS RF Xfin RF fin RF OSC IN fin IF PS IF V CCIF GND IF fp IF Do IF LD IF T1 T2 T1 T2 FC RF SW RF LDS Do RF OR LD / fout LDfr IF fr RF fp IF fp RF fr IF fr RF fp RF CN 1 CN 2 AND V CCRF GND RF Vp RF (19) ( ) (11) (17) (18) (12) (13) (10) (8) (7) (3) (4) (...

Page 6 - ELECTRICAL CHARACTERISTICS

MB15F74UL 6 * ■ ELECTRICAL CHARACTERISTICS (V CC = 2.7 V to 3.6 V, Ta = − 40 ° C to + 85 ° C) (Continued) Parameter Symbol Condition Value Unit Min Typ Max Power supply current I CCIF *1 fin IF = 2000 MHz V CCIF = Vp IF = 3.0 V 2.1 2.5 3.2 mA I CCRF *1 fin RF = 2500 MHz V CCRF = Vp RF = 3.0 V 5.7 6....

Page 8 - FUNCTIONAL DESCRIPTION; Pulse swallow function; : Output frequency of external voltage controlled oscillator (VCO); Serial Data Input; • Programmable Reference Counter; : Charge pump current select bit; Data Flow

MB15F74UL 8 ■ FUNCTIONAL DESCRIPTION 1. Pulse swallow function f VCO = [ (P × N) + A] × f OSC ÷ R f VCO : Output frequency of external voltage controlled oscillator (VCO) P : Preset divide ratio of dual modulus prescaler (32 or 64 for IF-PLL, 64or 128 for RF-PLL) N : Preset divide ratio of binary 11...

Page 9 - Divide ratio

MB15F74UL 9 (2) Data setting • Binary 14 - bit Programmable Reference Counter Data Setting Note : Divide ratio less than 3 is prohibited. • Binary 11 - bit Programmable Counter Data Setting Note : Divide ratio less than 3 is prohibited • Binary 7 - bit Swallow Counter Data Setting Divide ratio R14 R...

Page 10 - VCO Output

MB15F74UL 10 • Prescaler Data Setting • Charge Pump Current Setting • LD / fout output Selectable Bit Setting • Phase Comparator Phase Switching Data Setting Z : High-impedance Depending upon the VCO and LPF polarity, FC bit should be set. Divide ratio SW ==== “H” SW ==== “L” Prescaler divide ratio ...

Page 11 - Power Saving Mode (Intermittent Mode Control Circuit); Status; Normal mode; P S; s after the power supply becomes stable (V; “H”) at least 100 ns later after setting serial data.

MB15F74UL 11 3. Power Saving Mode (Intermittent Mode Control Circuit) The intermittent mode control circuit reduces the PLL power consumption. By setting the PS pin low, the device enters into the power saving mode, reducing the current consumption. Seethe Electrical Characteristics chart for the sp...

Page 12 - Serial Data Data Input Timing; Clock

MB15F74UL 12 4. Serial Data Data Input Timing Divide ratio is performed through a serial interface using the Data pin, Clock pin, and LE pin.Setting data is read into the shift register at the rise of the Clock signal, and transferred to a latch at the rise ofthe LE signal. The following diagram sho...

Page 13 - PHASE COMPARATOR OUTPUT WAVEFORM; LD output; f r; f p

MB15F74UL 13 ■ PHASE COMPARATOR OUTPUT WAVEFORM • LD Output Logic Notes : • Phase error detection range = − 2 π to + 2 π • Pulses on Do IF/RF signals during locking state are output to prevent dead zone. • LD output becomes low when phase error is t WU or more. • LD output becomes high when phase er...

Page 14 - TEST CIRCUIT (for Measuring Input Sensitivity fin/OSC; Oscilloscope

MB15F74UL 14 ■ TEST CIRCUIT (for Measuring Input Sensitivity fin/OSC IN ) 1000 pF 1000 pF 1000 pF 1000 pF 0.1 µ F Vp RF V CCRF 50 Ω 50 Ω 50 Ω S.G. S.G. S.G. Vp IF V CCIF 0.1 µ F 0.1 µ F 0.1 µ F 1000 pF Controller(Divide ratio setting) Oscilloscope GND OSC IN Data Clock PS RF V CCRF GND RF Xfin RF LE...

Page 15 - TYPICAL CHARACTERISTICS; fin input sensitivity; RF-PLL input sensitivity vs. Input frequency

MB15F74UL 15 ■ TYPICAL CHARACTERISTICS 1. fin input sensitivity 10 1000 1500 2000 2500 3000 3500 4000 4500 5000 5500 6000 V CC = 2.7 V V CC = 3.0 V V CC = 3.6 V SPEC 0 − 10 − 20 − 30 − 40 − 50 Pfin RF [dBm] fin RF [MHz] SPEC 10 0 500 1000 1500 2000 2500 3000 3500 V CC = 3.6 V V CC = 2.7 V V CC = 3.0...

Page 16 - input sensitivity; Input sensitivity vs. Input frequency; frequency f; Input sensitivity V

MB15F74UL 16 2. OSC IN input sensitivity V CC = 2.7 V V CC = 3.0 V V CC = 3.6 V SPEC 0 50 100 150 200 250 300 0 − 10 − 20 − 30 − 40 − 50 10 SPEC Input sensitivity vs. Input frequency Input frequency f OSC (MHz) Input sensitivity V OSC (dBm)

Page 17 - RF-PLL Do output current; Charge pump output current I; Charge pump output voltage V; Charge pump output voltage V

MB15F74UL 17 3. RF-PLL Do output current • 1.5 mA mode • 6.0 mA mode V CC = Vp = 3.0 V 10.0 0 − 10.0 1.0 3.0 0.0 2.0 Charge pump output current I DO (mA) I DO − V DO Charge pump output voltage V DO (V) I DO − V DO Charge pump output current I DO (mA) Charge pump output voltage V DO (V) V CC = Vp = 3...

Page 18 - IF-PLL Do output current; output current I; output voltage V; Charge pump; Charge pump; output voltage V

MB15F74UL 18 4. IF-PLL Do output current • 1.5 mA mode • 6.0 mA mode I DO − V DO Charge pump output current I DO (mA) Charge pump output voltage V DO (V) 10.0 0 − 10.0 1.0 3.0 V CC = Vp = 3.0 V 0.0 2.0 I DO − V DO Charge pump output current I DO (mA) Charge pump output voltage V DO (V) V CC = Vp = 3...

Page 19 - fin input impedance; input impedance

MB15F74UL 19 5. fin input impedance 866.25 Ω − 916.31 Ω 100 MHz 76.5 Ω − 319.2 Ω 500 MHz 31.078 Ω − 152.46 Ω 1 GHz 1 : 2 : 3 : START 100.000 000 MHz STOP 2 000.000 000 MHz 4 : 16.453 Ω − 46.539 Ω 2 000.000 000 MHz 1 3 2 4 35 336 Ω − 151.85 Ω 1 GHz 17.436 Ω − 52.191 Ω 2 GHz 20.211 Ω − 743.16 m Ω 3 GH...

Page 21 - REFERENCE INFORMATION; for Lock; • PLL Reference Leakage

MB15F74UL 21 ■ REFERENCE INFORMATION ( for Lock - up Time , Phase Noise and Reference Leakage ) (Continued) Test Circuit S.G. OSC IN fin Do LPF VCO Spectrum Analyzer 7.5 k Ω 2.7 k Ω 15000 pF 1500 pF 330 pF V CC = 3.0 V Ta = + 25 ° C CP : 6 mA mode f VCO = 2500 MHz K V = 50 MHz/V fr = 200 kHz f OSC =...

Page 23 - APPLICATION EXAMPLE

MB15F74UL 23 ■ APPLICATION EXAMPLE 1000 pF 1000 pF 1000 pF 1000 pF 0.1 µ F 3.0 V 3.0 V 3.0 V 3.0 V 0.1 µ F 0.1 µ F 0.1 µ F 1000 pF GND OSC IN Data Clock PS RF V CCRF GND RF Xfin RF LE fin RF 10 9 8 7 6 5 4 3 2 1 11 12 13 14 15 16 17 18 19 20 LD/fout Do IF Do RF Vp RF Vp IF PS IF V CCIF GND IF Xfin I...

Page 24 - Part number

MB15F74UL 24 ■ USAGE PRECAUTIONS (1) V CCRF , Vp RF , V CCIF and Vp IF must be equal voltage. Even if either RF-PLL or IF-PLL is not used, power must be supplied to V CCRF , Vp RF , V CCIF and Vp IF to keep them equal. It is recommended that the non-use PLL is controlled by power saving function. (2...

Page 25 - PACKAGE DIMENSION

MB15F74UL 25 ■ PACKAGE DIMENSION 20-pad plastic BCC (LCC-20P-M05) Dimensions in mm (inches) C 2001 FUJITSU LIMITED C20056S-c-2-1 3.60±0.10(.142±.004) 11 16 1 6 11 16 1 6 3.40±0.10 (.134±.004) INDEX AREA 0.05(.002) 0.55±0.05 0.075±0.025 (Stand off) 0.25±0.10 (.010±.004) TYP 0.50(.020) 3.00(.118)TYP 2...

Page 26 - FUJITSU LIMITED; FUJITSU LIMITED Printed in Japan

MB15F74UL FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU salesrepresentatives before ordering. The information and circuit diagrams in this document arepresented as examples of semiconductor devic...

Fujitsu MB15F74UL - Manual

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