Mitsubishi Electric WS-65513 - Manuals

5 Compatibility Users having difficulties with the memory card readershould be aware of the following requirements:For JPEG Pictures up to 128mb: 1. Still images recorded using the Exchangable Image File Format (EXIF) for digital still cam-eras and Design Rules for Camera File Sys-tems (DCF). 2. Sta...

6 MonitorLink™ MonitorLink is a new digital interface introduced inMitsubishi's 2003-2004 model line, including theV23 chassis. MonitorLink provides a proprietary connection forMitsubishi's HD-5000, Monitor/Receiver, allowingMitsubishi's upgradeability promise to be fulfilledusing a digital, rather ...

7 Used with its optional copy protection scheme, DVImakes it possible to view full resolution signals with-out exposing the signal to copyright infringement.It is the digital equivalent of component DTV con-nections (Y,Pr,Pb) that can be configured for use ina copy protected environment. The DVI sta...

8 Display Data Channel (DDC) The VESA standard Display Data Channel, shownin Figure 10, is part of the DVI specification. It is an I 2 C bus used for data communications between the two devices. The data can include informationspecifying the type of display device connected andcan also be used to su...

9 High-bandwidth Digital Content Protection(HDCP) HDCP is a system designed to protect the outputs ofa DVI device from being copied. The protection canbe applied in various ways. • Unrestricted copies• Limited number of copies• Limited use of copies• No copies Since this is a optional element of DVI...

10 P IN S IGNAL P IN S IGNAL 1 T M D S D a ta 2- 16 Hot Plug Detect 2 T M D S D a ta 2+ 17 T M D S D a ta 0- 3 T M D S 2 & 4 S hi e ld 18 T M D S D a ta 0+ 4 T M D S D a ta 4- (NA ) 19 T M D S 0 & 5 S hi e ld 5 T M D S D a ta 4+ (NA ) 20 T M D S D a ta 5- (NA ) 6 D D C C lock 21 T M D S D a ...

12 Chassis Option Menu Adjustment Mode Convergence Mode OSD Position VZ5/VZ6/V15 1-3-7-0 2-3-5-7 2-3-5-9 <6><5><4> Adjust Mode VZ7/VZ8/V16 1-2-7-0 1-2-5-7 1-2-5-9 <6><5><4> Adjust Mode V17 8-2-7-0 8-2-5-7 8-2-5-9 <6><5><4> Adjust Mode VZ9/V18/V19...

1-1 Chapter 1 Disassembly and Service Figure 1-1: Lightbox Removal - 48” Models With 11 different models, mechanical features anddisassembly procedures vary in the V23. Since allfeatures and disassembly procedures are in the Ser-vice Manual, this chapter will only provide a gen-eral discussion. The ...

1-2 The lightbox removal procedure for 48” V23 mod-els is shown in Figure 1-1 . 1. Remove the Back Board by removing 7 screws (a), 2 screws (b) and 8 screws (c). 2. Remove the Back Cover by removing 8 screws (d). 3 Remove 4 screws (e) to remove the Board Slide. 4. Remove 8 screws (f) to remove the B...

1-5 PCB & Major Component Locations PCB and major component locations are shown in Figures 1-4 and 1-5. The major circuit functions performed on each PCB is listed in Table 1-1 . Convergence IC Replacement To maximize cooling efficiency, the ConvergenceAmplifier ICs, IC8C01 & IC8C02, are mou...

2-1 Chapter 2 Alignment Procedures With the exception of the Service Menu access codes,the general alignment procedures for the V23 chas-sis remains the same as previous HD chassis. A chartshowing all recent Service Menu Access Codes isprovided on page 12 of the Introduction. This chap-ter will give...

2-2 Audio Edit Setup Clock Setting Manual Volume 30% Review Time 12:00 AM Bass 50% Antenna A (v) Enabled Day Monday Treble 50% Antenna B (v) Enabled Balance 50% Input DTV (v) Enabled Analog Captions W ith Mute Surround Off Input 1 (v) Enabled Background Gray Listen to Stereo Input 2 (v) Enabled Digi...

2-3 Circuit Adjustment Mode Most of the adjustments can only be performed us-ing the remote hand unit. See Figure 2-2 . Many of the adjustments must be performed in both the 480iand 1080i modes. Video/Color adjustments mustbe performed in the 480i and 1080i modes, and datamust be preset in the 480P ...

2-4 Selection of adjustment Functions andAdjustment Items To select an adjustment item in the circuitadjustment mode, first select the adjustmentfunction that includes the specific adjust-ment item to be selected. Then select theadjustment item. Refer to the followingpages for the listing of adjustm...

2-5 Convergence Adjustment Mode The Convergence mode is used to perform raster ge-ometry correction and convergence adjustments. These adjustments must be made in both the SD(NTSC 480i) and HD (1080i) modes. Note: Before activating the Convergence mode, turn “Video Mute” Off. The internalcrosshatch ...

2-6 1) Use AUDIO button to select a Sub Function 2) Use the VIDEO button to select an Adjustment Item. 3) Use the ADJUST buttons to change data. FINE CONV (Press 4)This mode is used to perform Fine RasterCorrection, and Fine Red and Blue Conver-gence Adjustments. There are three SubAdjustment Functi...

3-1 Chapter 3 Power Supply From the above diagram, it is apparent that the V23Chassis has four Power Supply Operational Modes. 1) Low Energy Mode2) Standard Standby Supply Mode.3) Time Shift Recording Mode.4) Conventional PTV On Mode. Low Energy Mode When the Low Energy Mode is activated the TV uses...

3-2 A 132 kHz internal Oscillator drives an internal OutputFET. The signal from the FET at pin 5 of IC9A10,drives transformer T9A10. Signal from pin 10 of T9A10is rectified, generating the 9VS supply. The signal from pin 2 of the transformer is rectified andtakes two paths: 1) To pin 1 of IC9A10, ad...

3-3 Low Energy Power Distribution Figure 3-4 shows the Low Energy Mode Power Dis- tribution. As stated earlier, the Low Energy 9VS is thesource for the 5VS, 3.3V-ES and 3.3VS-1. The 5VSand 3.3VS-1 supplies power to the IC7A00 the PTVControl µPC. The 3.3V-ES supplies power to the PTV Control cir-cuit...

3-4 Standard Standby Supply The Standard Standby Regulator circuit is shown in Fig- ure 3-5. Start-up The Start-up Voltage Supply is from R9A18 in the LowEnergy Mode circuit, refer to Figure 3-2 . The SUB- POWER command from the Control Circuitry activatesthe Standby Supply. When SUB-POWER goes High...

3-5 Standard Standby Supplies Two Standby supplies are generated directly fromT9A20, 12VS and 6VS. Both of these supplies aredirected to the DM module, and are denoted as 12V-DM and 6V-DM. A 30VS supply is derived from the 12VS source usingvoltage doubler circuitry, comprised of D9A31, D9A32,C9A32 a...

3-6 When PON-1 goes High, Q9A21 turns Off, allowingQ9A20 to turn On. With Q9A20 conducting, the 12Vsupply is generated from the 12VS supply. The 12Vsupply enables IC9A22 and the 5V-1 supply is gener-ated. Time Shift Supply Power Distribution Figure 3-8 illustrates the Power Distribution for the Time...

3-7 gence Generator, 3DYC and Signal Select circuitry, andto IC2E65. IC2E65 generates 2.5 Volts for 3DYC. The 12V supply provides power for Tuners and CRTProtect circuitry. It also is the source of four additionalDC Supplies: • 9V-1 for the Signal Select circuitry• 5V-DECOD for the NTSC Decoders.• 9...

3-8 the oscillator drive to the FET. The PWM is automati-cally changed to maintain a constant 110V source. Five supplies are directly generated by signal fromT9A50, 210V, 110V, 17V, +24V and -24V. Power Distributions Figure 3-10 shows the Switched Supplies Power Dis- tribution. The 110V supplies pow...

3-9 If the LED does not flash: • Check that the DM board is seated properly.• Check that there is Standby 9VS (Fig. 3-2) . • Check that the SUB-POWER command line does not go High (Fig. 3-5 ). • Chirping sound - check the Standby Regulator, IC9A20 (Fig.3-5). • If it Turns On then Off -Check the ±24V...

4-1 Chapter 4 Control Circuitry As in the two earlier integrated HDTV chassis, V19and V21, the V23 uses two Microprocessors in theControl circuitry. 1) TV µPC … controlling the analog circuitry.2) DM µPC … controlling the digital circuitry. The two µPCs constantly communicate with each other.User co...

4-2 we are not showing the details of the DM circuitry. Fig- ure 4-1 shows only the DC supplies and Reset signal going to the DM module. Reset Circuitry Figure 4-2 illustrates the Reset circuitry in more detail. The normal and Reset logic are shown in the diagram. IC7C70 is the Reset IC. A Low from ...

4-3 Both the µPCs have the ability to reset each other ifcommunication is lost. IC7C30 serves as a Reset inter-face between the two µPCs and the front panel Resetbutton. If the TV µPC gets no response from the DM,it outputs a High at pin 73 of IC7A00. The High isrouted through IC7C30 and drives the ...

4-5 Note that the output of the Wide Band Preamp (IR-IN)is also directed to the SYS-5 µPC. This connectionwas not used in the V19 and V21. It enables the Learn-ing feature. The signals from the units Remote are memo-rized by the SYS-5 circuitry. Serial Data Lines Figure 4-4 shows the Serial Data lin...

4-6 SHORT Detect The short Detect circuitry is shown in Figure 4-6 and is the same as in the V19 and V21 chassis. If a shortoccurs in the + or – 24V supplies, pin 46 on IC7A00goes Low indicating a short and the TV shuts Off. With-24V shorted, the 12VS supply turns Q9A53 On, pull-ing the SHORT line L...

4-7 Parallel Outputs Most of the parallel outputs are listed in Table 4-2. Most of them have been used before and need no explana-tion. However, the function of two items should be de-scribed. BWC (Band Width Control) This line is directed to the Doubler circuitry, and auto-matically becomes active ...

4-8 The PerfectColor feature is performed in the Doublercircuit, therefore all signal sources must pass throughthe Doubler. With DM signal sources, any OSD is al-ready inserted in the signal before it goes to the Dou-bler. The PerfectColor circuitry can cause incorrect colorin the OSD. The DM-BLK si...

5-2 PCB-TERMINAL Video Path Figure 5-1 illustrates the Video Signal Path on the PCB- TERMINAL. The AV-Switch circuitry has not changed,IC2L00 and IC2K00 are the same ICs used in the V21chassis. The 3DYC Motion Adaptive Come Filter provides aclean separation of luminance (Y) and chroma (C) sig-nals. ...

5-3 The Sub picture signals from IC2B00 are directed toIC2G00, the Sub Decoder. Switch circuitry in IC2G00selects Sub picture signals from IC2B00 or the AV-SW(2), IC2K00. As in previous chassis, the main and sub selected YPbPrsignal are direct to the PCB-SIGNAL. PCB-SIGNAL Video Path Figure 5-2 show...

5-4 The outputs of the Doubler circuit, ASIC-Y, ASIC-Pband ASIC-Pr are directed to the VCJ. The signals areprocessed in the VCJ and CRT RGB drive signals areoutput at pins 64, 63, and 62. CRT Drive & Protect Circuitry Figure 5-3 shows the CRT Drive circuitry. Since it is the same as that in the ...

5-5 Digital Signal Path The basic Digital Signal path was shown in Figure 5-2. Figure 5-4 shows the Digital Path in more detail. Digi- tal signal sources are the DTV/AQM Tuner, 1394 In-puts and the front panel Card Reader. There are two1394 inputs at the rear of the DM module. A third 1394input is o...

5-6 Monitor Out Circuit Figure 5-5 shows that the Monitor Output signal source is limited to an NTSC source, or the DM Module. TheNTSC Y and C signals from the 3DYC Comb Filter,are directed back to IC2L00. IC2L00 directs the sig-nals to the monitor Inputs of IC2K00. IC2K00 selects the signal from IC...

6-1 Chapter 6 Sync, Deflection & High Voltage The Overall Sync, Deflection and Hign Voltage cir-cuitry in the V23 is shown in the Block Diagram atthe top of the page. The V23 can display either oftwo scanning formats, 480p or 1080i. The horizon-tal scanning frequency for 480p is 31.5 kHz, and108...

6-2 Sync Signal Path Figure 6-1 illustrates the Sync Signal Path for the Main Picture signals on the PCB-Terminal. IC2K00,IC2A00, IC2B00 and IC2A95 comprise the MainPicture Sync Select Circuitry. Sync must be extractedfrom NTSC, Composite and Component Format YSignals. NTSC and Composite signals are...

6-6 Horizontal Deflection DC Supply Circuitry The DC supplies for Q5A32 and Q5A31 are derivedfrom Horizontal Deflection DC Supply circuitry. The31K line from the Control µPC controls the DC volt-age for Q5A31. Q5A31 supply voltage is approxi-mately 10 volts higher for the 33.75 kHz scan for-mat (108...

6-7 The DEFL-MUTE line from the µPC and Q5A08reduce the DC supply during scan frequency changeby the same method. The DC supply for the Horizontal Drive transistor,Q5A32, is derived from the Horizontal Output DCsupply through R5A36, R5A37 and Q5A34. In the31.5 kHz mode, the DC supply for Q5A32 would...

6-8 HV & HV Regulation Figure 6-8 illustrates the HV and HV Regulation cir- cuitry. Drive from the Horizontal Deflection Out-put circuitry is applied the HD-IN input of IC5A00.IC5A00 amplifies the signal which is output at pin1, and through Q5A07 and Q5A09, is applied to thegate of Q5A51. The ou...

6-9 DO NOT measure the HV-DC-FB voltage at pin 13 of the T5A51. The meter may load down the inter-nal resistive divider, resulting in excessive HV. X-Ray Protect X-Ray Protect circuitry is the basically the same asin previous models, as shown in Figure 5. The X- Ray Protect circuit in the V20 monito...

7-1 Chapter 7 Convergence Circuitry The Overall Block Diagram in Figure 7-1 shows the the V23 Convergence Circuitry.. A Waveform Gen-erator generates the convergence correction signalstimed from horizontal and vertical sync pulses. Thecorrection signals from the Waveform Generator arein a serial dig...

7-2 Waveform Generator & D/A Converter Figure 7-2 illustrates the Convergence Waveform Generator and Digital/Analog Converter circuitry.Horizontal Sync from the doubler circuitry is appliedto pin 34 of IC8D00. Vertical Sync is applied to pin27. From these two signals, IC8D00 generates sixConverg...

7-4 Convergence Output Circuitry Figure 7-4 shows the Convergence Output circuitry located on the PCB-Power. The correction signals Figure 7-4: Convergence Output Circuitry are amplified and directed to the Sub Vertical andSub Horizontal coils located within their respectivered, green and blue Defle...

8-1 Chapter 8 Sound Circuitry The V23 Sound Circuitry is shown above in the Over-all Block Diagram, Figure 8-1 . The Sound Source Select circuitry selects the soundsource for both the main and sub pictures. Thesources correspond to the Video Inputs: • Main Tuner• Sub Tuner (monaural only)• Three Ext...

8-2 Figure 8-2: Overall Sound Circuitry Block Diagram

8-3 Overall Sound Signal Path Figure 8-2 illustrates the Overall Sound Circuitry Block Diagram. The AV/SW ICs, IC2L00 andIC2K00, used to select Main and Sub Picture Video/Color are also used to the select the Sound sources. IC2L00 selects Main and Sub sound sources fromthe Main Tuner (decoded by MCS...

9-1 Chapter 9 Troubleshooting Tips Use the following tips when troubleshooting the sourceof a problem in the V23 chassis. Using The Front Panel LED The Front Panel LED helps isolate the cause of thefollowing problems. • The TV will not turn On.• The TV turns On, and then Shuts Off. If the TV will no...

9-2 DM Module Check When the TV turns On, but a problem exists that maybe caused by the DM Module, perform the followingtwo checks: 1) Select the DTV Antenna as the source an select and HD Channel. 2) Select an analog 480i signal as the source and note if an On Screen Display (OSD) ispresent. The ab...

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