Page 3 - Warranty Information; Quatech Inc. warrants the
Warranty Information Quatech Inc. warrants the MPA-200/300 to be free of defects for one (1) year from the date of purchase. Quatech Inc. will repair or replace any adapter that fails to perform under normal operating conditions and in accordancewith the procedures outlined in this document during t...
Page 4 - 675 Hudson Industrial Parkway
The information contained in this document cannot be reproduced in any formwithout the written consent of Quatech, Inc. Likewise, any software programsthat might accompany this document can be used only in accordance with anylicense agreement(s) between the purchaser and Quatech, Inc. Quatech, Inc.r...
Page 5 - Compliances - Electromagnetic Emissions; Type
Compliances - Electromagnetic Emissions EC - Council Directive 89/336/EEC This equipment has been tested and found to comply with the limits of thefollowing standards for a digital device: EN50081-1 (EN55022, EN60555-2, EN60555-3) EN50082-1 (IEC 801-2, IEC 801-3, IEC 801-4) Type of Equipment: In...
Page 6 - TABLE OF CONTENTS
TABLE OF CONTENTS 37 13 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 12 DEFINITION OF INTERFACE SIGNALS . . . . . . . . . . . 32 11.2 Null-Modem Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 11.1 MPA-200 and EIA-530 Compati...
Page 7 - Quatech Inc., MPA-200/300 Manual
Page 8 - INTRODUCTION
1 INTRODUCTION The Quatech MPA-200/300 is a single channel, synchronous serial communica-tion port for systems utilizing the architecture of the IBM AT personal or compati-ble computers. The MPA-200 is RS-422 compatible. The MPA-300 has RS-485 data line drivers and receivers in place of theMPA-200's...
Page 10 - HARDWARE INSTALLATION
2 HARDWARE INSTALLATION If the default address and interrupt settings are sufficient, the MPA-200 can bequickly installed and put to use. The factory default settings are listed below inTable 1. Table 1 Default Board Configuration DMA/DRQ 1 DMA/DRQ 3 IRQ 5 300 hex RxDMA TxDMA Interrupt Address 1. If...
Page 11 - SCC GENERAL INFORMATION
3 SCC GENERAL INFORMATION The Serial Communications Controller (SCC) is a dual channel, multi-protocoldata communications peripheral. The MPA-200 provides a single channel forcommunications, however, to provide full DMA capabilities, both channels of theSCC can be utilized. The SCC can be software c...
Page 12 - Accessing the registers
3.1 Accessing the registers The mode of communication desired is established and monitored through the bitvalues of the internal read and write registers. The register set of the SCC includes16 write registers and 9 read registers. These registers only occupy four addresslocations, which start at th...
Page 15 - Baud Rate Generator Programming; Table 4 Time constants for common baud rates
3.2 Baud Rate Generator Programming The baud rate generator (hereafter referred to as the BRG) of the SCC consists ofa 16-bit down counter, two 8-bit time constant registers, and an output divide-by-two. The time constant for the BRG is programmed into WR12 (least significantbyte) and WR13 (most sig...
Page 16 - SCC Data Encoding Methods
3.3 SCC Data Encoding Methods The SCC provides four different data encoding methods, selected by bits D6 andD5 in WR10. These four include NRZ, NRZI, FM1 and FM0. The SCC alsofeatures a digital phase-locked loop (DPLL) that can be programmed to operate inNRZI or FM mode. Also, the SCC contains two f...
Page 17 - JUMPER BLOCK CONFIGURATIONS; J4 - Interrupt Configuration
4 JUMPER BLOCK CONFIGURATIONS The MPA-200 utilizes seven user-selectable jumper blocks , that allow the usermore flexibility when configuring the board. The following section explains thefunction of each of the jumper blocks on the MPA-200. 4.1 J4 - Interrupt Configuration J4 is a three pin jumper w...
Page 18 - J10 - Transmit DMA Channel Selection
5&10 IRQ15 4&9 IRQ14 3&8 IRQ12 2&7 IRQ11 1&6 IRQ10 4.3 J10 - Transmit DMA Channel Selection J10 selects the DMA channel to be used for transmit DMA. Three channels (1 - 3)are available on the MPA-200 for DMA. When selecting a DMA channel, boththe DMA acknowledge (DACK) and the DM...
Page 20 - J8 - SYNCA to RLEN control
Table 10 Jumper block J7 connections 5&6 Receiver controlled by Comm. Register 4&5 Receiver Always Enabled 2&3 Transmitter controlled by Comm. Register 1&2 Transmitter Always Enabled Pins Driver Control Function 4.6 J8 - SYNCA to RLEN control J8 controls the signal path from the RLEN...
Page 21 - ADDRESSING; Figure 1 Address switch selection examples.; ON; SW; 5 Quatech Inc., MPA-200/300 Manual
5 ADDRESSING The MPA-200 occupies a continuous 8 byte block of I/O addresses. For example,if the base address is set to 300H, then the MPA-200 will occupy addresslocations 300H-307H. The base address of the MPA-200 may be set to any of thefirst 64 Kbytes (0 - FFFFH) of available I/O address space th...
Page 23 - INTERRUPTS; Do a software interrupt acknowledge to the SCC. This is accom-
6 INTERRUPTS The MPA-200 supports eleven interrupt levels: IRQ2 -7, IRQ10 - 12, and IRQ14- 15. The interrupt level is selected through jumper blocks J5 and J6 ( seeJUMPER BLOCK CONFIGURATIONS on page 11). The interrupt source isselected by bits D4 and D5 of the configuration register. The MPA-200 ha...
Page 24 - DIRECT MEMORY ACCESS
7 DIRECT MEMORY ACCESS Direct Memory Access (DMA) is a way of directly transferring data to and frommemory, resulting in high data transfer rates with very low CPU overhead. TheMPA-200 allows the user to perform DMA transfers when data is received(DMARRQ) or when data is transmitted (DMATRQ). Three ...
Page 25 - 9 Quatech Inc., MPA-200/300 Manual
of the SCC, a DMA request is generated. The DMA controller then writes the datafrom the SCC into memory. Programming for DMA request on both transmit and receive is simply a combina-tion of the two. There are three possible configurations that can be used, depend-ing on the sources selected. The fir...
Page 26 - Using Terminal Count to Generate an Interrupt
Figure 3 Block diagram of DMA on MPA-200. W/REQA DTR/REQA W/REQB SCC DMATRQ DRMRRQ J10 J11 PAL 7.1 Using Terminal Count to Generate an Interrupt The MPA-200 allows the option of generating an interrupt whenever the TerminalCount (TC) signal is asserted. Terminal Count is an indicator generated by th...
Page 27 - CONFIGURATION REGISTER
8 CONFIGURATION REGISTER The MPA-200 is equipped with an onboard register used for configuring informa-tion such as DMA enables, DMA sources, interrupt enables, and interrupt sources.Below is a detailed description of the configuration register. The address of thisregister is Base+5. Table 13 detail...
Page 29 - COMMUNICATIONS REGISTER
9 COMMUNICATIONS REGISTER The MPA-200 is equipped with an onboard communications register which givesthe user options pertaining to the clocks and testing. The user can specify thesource and type of clock to be transmitted or received. Test mode bits pertain onlyto the DTE versions and can be ignore...
Page 31 - 0 DTE / DCE Configuration; 5 Quatech Inc., MPA-200/300 Manual
10 DTE / DCE Configuration The MPA-200 can be purchased in either Data Terminal Equipment (DTE) orData Communications Equipment (DCE) configuration. The two configurationsshare some important features, but have significant differences which need to bementioned. Both the DTE and DCE configurations al...
Page 32 - DTE Configuration; Figure 2 DTE Clock Configuration
10.1 DTE Configuration The control signals that the DTE can generate are the Request To Send (RTS) andData Terminal Ready (DTR). It can receive the signals Carrier Detect (CD), Clearto Send (CTS), and Data Set Ready (DSR). All of the control signals arecontrolled through channel A of the SCC, with t...
Page 33 - DCE Configuration; 7 Quatech Inc., MPA-200/300 Manual
10.2 DCE Configuration On the MPA-200, the difference between the DTE and DCE signals is that, withthe exception of a few control signals, the pins used for signal transmission on theDTE are used for signal reception on the DCE and vice versa. For example, pin 2of the DCE connector is received data,...
Page 34 - Figure 3 DCE Clock Configuration
Figure 3 DCE Clock Configuration TRXCA RTXCA RTXCB RRCLK RTCLK TRXCB RCKEN TTCLK TCKEN (RCLK) (TCLK) The Test Mode (TM) signal is always in the OFF condition and cannot be changedby the user. The Local Loopback (LL) and Remote Loopback (RL) test signals arenot implemented on the DCE. Table 16 summar...
Page 35 - 1 EXTERNAL CONNECTIONS
11 EXTERNAL CONNECTIONS When configured as a DTE, the MPA-200 uses a D-25 short body male connector(labeled CN2). When configured as a DCE, the MPA-200 uses a D-25 long bodyfemale connector (labeled CN1). Table 15 and Table 16 describe the pin outdefinitions for both connectors and Figure 6 and Figu...
Page 39 - 2 DEFINITION OF INTERFACE SIGNALS; CIRCUIT AB - SIGNAL GROUND
12 DEFINITION OF INTERFACE SIGNALS CIRCUIT AB - SIGNAL GROUND CONNECTOR NOTATION: DGND DIRECTION: Not applicableThis conductor directly connects the DTE circuit ground to theDCE circuit ground. CIRCUIT CC - DATA SET READY (DSR) CONNECTOR NOTATION: +DSR,-DSR DIRECTION: From DCEThis signal ind...
Page 42 - CONNECTOR NOTATION: TEST MODE
CIRCUIT TM - TEST MODE (TM) CONNECTOR NOTATION: TEST MODE DIRECTION: From DCEThis signal indicates to the DTE that the DCE is in a test condition.The DCE generates this signal when it has received a localloopback or remote loopback signal from the DTE. Quatech Inc., MPA-200/300 Manual 36
Page 43 - 3 SPECIFICATIONS
13 SPECIFICATIONS Bus interface: IBM AT 16-bit bus Controller: Serial Communications Controller, 6 MHz (determined by user, typically an Intel 82530). Physical Dimensions: 7.65” x 4.2” Interface: DTE: male D-25 connector DCE: female D-25 connector Transmit drivers: EIA-422: MC3487 or compatible EIA-...
