Page 2 - RETURN REQUESTS/INQUIRIES; OMEGAnet
WARRANTY/DISCLAIMER OMEGA ENGINEERING, INC., warrants this unit to be free of defects in materials and workmanship for a period of 1 3 m o n t h s from the date of purchase. OMEGA warranty adds an additional one (1) month grace period to the normal o n e ( 1 ) y e a r p r o d u c t w a r r a n t y t...
Page 5 - Notice; Copyright
Notice The information contained in this document cannot be reproduced in any form without thewritten consent of Omega Engineering Inc. Any software programs accompanying thisdocument can be used only in accordance with any licensing agreement(s) between OmegaEngineering Inc. and the purchaser. Omeg...
Page 6 - Table of Contents; Theory of Operation
Table of Contents 35 5.1.2 Card Configuration and Status Register (CCSR) . . . . . . . . . . . . . . . . . . . . 35 5.1.1 Configuration and Option Register (COR) . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.1 PCMCIA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
Page 8 - List of Figures and Tables
List of Figures and Tables 54 Table 5-22. Auxiliary Status Register Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 5-21. Auxiliary Control Register Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Table 5-20. Timer/Count...
Page 10 - Hardware Configuration and Initial Setup; Card Information Structure (CIS) Differences
2. Hardware Configuration and Initial Setup 2. 1 Software Installation: Windows 95/98/2000 ® An “INF” file (daqpcard.inf) is included on the root directory of the DaqSuite CD to allow easyconfiguration in the Windows environment. Windows uses the “INF” file to determine thesystem resources required ...
Page 11 - Hardware Found Wizard.
2 . 1 . 2 W i n d o w s 9 8 1. Insert the DAQP card into any available PC Card socket. The first time a new PC Card type is installed the “Add New Hardware Wizard ” window will open. ClickNext to continue. 2. The Add New Hardware Wizard provides several options to configure the DAQP card. Select the...
Page 14 - Data Acquisition Software and Drivers
2. 3 Data Acquisition Software and Drivers Data acquisition software and driver support installations are available from the DaqSuite CDdemo main menu. 1. Q u a t e c h ’ s D a q E Z ? - This software package was specifically designed to support all Quatech’s data acquisition adapter functions and i...
Page 15 - E n a b l e r
2. 4 Software Installation: Windows 3.x and MS-DOS® Two software configuration programs are provided with the DAQP card: a Client Drivernamed DAQPA_CL.SYS and a card Enabler named DAQPA_EN.EXE. Either one of theseprograms may be used to configure the card b u t o n l y o n e m a y b e u s e d a t a ...
Page 28 - Theory of Operation
4. Theory of Operation The DAQP card consists of 4 differential or 8 single-ended analog input channels each with abipolar input range of ±10v, ±5v, ±2.5v or ±1.25v (programmable gain of 1, 2, 4 or 8). The A/Dconverter, either 12 -bit or 16-bit, can be operated at a top speed of 100,000 samples per ...
Page 30 - Scan List Register
4. 4 Scan List Register One entry to the scan list register contains a 16-bit word or two 8-bit bytes. It specifies theinternal channel and gain selection in the high byte or MSB, and the external channel and gainselection in the low byte or LSB , in addition to other control and configuration setti...
Page 31 - T r i g g e r C i r c u i t
4. 5 T r i g g e r C i r c u i t The DAQP card can be triggered by software, an external TTL signal, the analog input passingthrough the preset threshold or the pacer clock. For the TTL or analog trigger, an activetrigger edge can be selected for either the low-to-high or high-to-low transition.In o...
Page 33 - Interrupt and Status
4. 7 Interrupt and Status The DAQP card has three interrupt sources, the end-of-scan (EOS) interrupt, the FIFOthreshold interrupt and the timer interrupt. The control register (base + 2, write only) has twobits to enable or disable the EOS and FIFO interrupts independently. However, it is stronglyre...
Page 37 - PCMCIA Interface; Card Configuration and Status Register
5. I/O Registers 5. 1 PCMCIA Interface The information in this section is provided for those who need low level PCMCIA interfacedetails for the DAQP card . The client driver or enabler that comes with the DAQP card will besufficient for most applications. The DAQP card performs data acquisition for ...
Page 43 - Note
5.2.1.3 FIFO Flags When reading the register under mode 1 or 3, the first available data byte from the data FIFOwill be returned if it is not empty, otherwise the returned byte is not defined. The FIFO fullflag will be cleared after the data FIFO register is read provided there are no more data byte...
Page 46 - internal trigger source is specified.
5.2.2.5 Expansion Mode Bit 5 must be set to “1” if there is an expansion card(s) connected to the DAQP card . All of thedigital output lines (bits 0-3) will be used for external channel selection and two of the fourdigital input lines (bit 1 and 3) will be used for external gain selection. 5.2.2.6 I...