MSI H6M-P3 (B3)- User Manual

MSI H6M-P3 (B3)

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Table of Contents:

  • Page 3 – Figure 2. Pin Connection
  • Page 4 – PIN DESCRIPTION; Pin Name
  • Page 5 – unless otherwise; GENERAL INTERFACE ELECTRICAL CHARACTERISTICS; POWER DISSIPATION
  • Page 6 – Figure 3. Test Circuit; OUTPUT; Figure 4. Test Load Circuit; Output; SDA; Test Load; Symbol; Low Level Input Voltage
  • Page 7 – Figure 6. Serial Input Interface Clocks; MPEG
  • Page 8 – PFD; Figure 7. PLL and Clocks Generation System
  • Page 9 – registers description.; C BUS SPECIFICATION; The STA013 supports the I
  • Page 11 – DESCRIPTION
  • Page 13 – PLLCTL
  • Page 18 – Figure 12. Volume Control and Output Setup
  • Page 21 – PCMCONF; Figure 13. LRCKT Polarity Selection
  • Page 22 – PCMCROSS; The default configuration for this register is ’0x00’.; ANCILLARY DATA BUFFER
  • Page 23 – SOFTVERSION
  • Page 27 – GENERAL INFORMATION
  • Page 28 – IO
  • Page 29 – Pad-timing versus load
  • Page 31 – RESET
  • Page 34 – C REGISTER VALUE
  • Page 35 – OUTLINE AND
  • Page 36 – mm
  • Page 38 – STMicroelectronics GROUP OF COMPANIES
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February 2004

ORDERING NUMBERS: STA013$ (SO28)

STA013T$ (TQFP44)

STA013B$ (LFBGA 8x8)

SINGLE CHIP MPEG2 LAYER 3 DECODER

SUPPORTING:
- All features specified for Layer III in ISO/IEC
11172-3 (MPEG 1 Audio)
- All features specified for Layer III in ISO/IEC
13818-3.2 (MPEG 2 Audio)
- Lower sampling frequencies syntax extension,
(not specified by ISO) called MPEG 2.5

DECODES LAYER III STEREO CHANNELS,

DUAL CHANNEL, SINGLE CHANNEL
(MONO)

SUPPORTING ALL THE MPEG 1 & 2 SAM-

PLING FREQUENCIES AND THE EXTEN-
SION TO MPEG 2.5:
48, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz

ACCEPTS MPEG 2.5 LAYER III ELEMEN-

TARY COMPRESSED BITSTREAM WITH
DATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s

DIGITAL VOLUME CONTROL
DIGITAL BASS & TREBLE CONTROL
SERIAL BITSTREAM INPUT INTERFACE
ANCILLARY DATA EXTRACTION VIA I2C IN-

TERFACE.

SERIAL PCM OUTPUT INTERFACE (I

2

S

AND OTHER FORMATS)

PLL FOR INTERNAL CLOCK AND FOR OUT-

PUT PCM CLOCK GENERATION

LOW POWER CONSUMPTION:

85mW AT 2.4V

CRC CHECK AND SYNCHRONISATION ER-

ROR DETECTION WITH SOFTWARE INDI-
CATORS

I

2

C CONTROL BUS

LOW POWER 3.3V CMOS TECHNOLOGY
10 MHz, 14.31818 MHz, OR 14.7456 MHz

EXTERNAL INPUT CLOCK OR BUILT-IN IN-
DUSTRY STANDARD XTAL OSCILLATOR
DIFFERENT FREQUENCIES MAY BE SUP-
PORTED UPON REQUEST TO STM

APPLICATIONS

PC SOUND CARDS
MULTIMEDIA PLAYERS

DESCRIPTION
The STA013 is a fully integrated high flexibility
MPEG Layer III Audio Decoder, capable of de-
coding Layer III compressed elementary streams,
as specified in MPEG 1 and MPEG 2 ISO stand-
ards. The device decodes also elementary streams
compressed by using low sampling rates, as speci-
fied by MPEG 2.5.
STA013 receives the input data through a Serial
Input Interface. The decoded signal is a stereo,
mono, or dual channel digital output that can be
sent directly to a D/A converter, by the PCM Out-
put Interface. This interface is software program-
mable to adapt the STA013 digital output to the
most common DACs architectures used on the
market.
The functional STA013 chip partitioning is de-
scribed in Fig.1.

STA013

STA013B STA013T

MPEG 2.5 LAYER III AUDIO DECODER

®

SO28

TQFP44

LFBGA64

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Summary

Page 3 - Figure 2. Pin Connection

Figure 2. Pin Connection VDD_1 VSS_1 RESET SDA SCL SCKR SDI BIT_EN SDO VDD_4 VSS_4 XTI FILT XTO PVSS PVDD VDD_3 VSS_3 1 3 2 4 5 6 7 8 9 26 25 24 23 22 20 21 19 27 10 28 VDD_2 TESTEN D98AU911A VSS_2 SCKT LRCKT VSS_5 SRC_INT SCANEN 11 12 13 18 16 17 15 14 OCLK OUT_CLK/DATA_REQ 1 2 3 5 6 4 7 8 9 10 17 ...

Page 4 - PIN DESCRIPTION; Pin Name

PIN DESCRIPTION SO28 TQFP44 LFBGA64 Pin Name Type Function PAD Description 1 29 B5 VDD_1 Supply Voltage 2 30 B4 VSS_1 Ground 3 31 A4 SDA I/O i 2 C Serial Data + Acknowledge CMOS Input Pad BufferCMOS 4mA Output Drive 4 32 B3 SCL I I 2 C Serial Clock CMOS Input Pad Buffer 5 34 A1 SDI I Receiver Serial...

Page 5 - unless otherwise; GENERAL INTERFACE ELECTRICAL CHARACTERISTICS; POWER DISSIPATION

1. ELECTRICAL CHARACTERISTICS: V DD = 2.7V ± 0.3V; T amb = 0 to 70°C; Rg = 50 Ω unless otherwise specifiedDC OPERATING CONDITIONS Symbol Parameter Value V DD Power Supply Voltage 2.4 to 3.6V GENERAL INTERFACE ELECTRICAL CHARACTERISTICS Symbol Parameter Test Condition Min. Typ. Max. Unit Note I IL Lo...

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