Sun Microsystems SME5224AUPA-400 - Manuals

5 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc S YSTEM I NTERFACE Figure 2 shows the major components of a UPA based uniprocessor system. The system controller [1] for the UPA bus arbitrates between the UltraSPARC™–II, 400 M...

6 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc Module ID Module IDs are used to configure the UPA address of a module. The UPA_PORT_ID[4:3] are hardwired onthe module to “0”. UPA_PORT_ID[1:0] are brought out to the connector pins. Each modul...

7 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc S IGNAL D ESCRIPTION [1] System Interface Signal Type Name and Function UPA_ADDR[35:0] I/O Packet switched transaction request bus. Maximum of three other masters and onesystem ...

8 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc JTAG/Debug Interface Signal Type Name and Function TDO O IEEE 1149 test data output. A three-state signal driven only when the TAP controller isin the shift-DR state. TDI I IEEE 1149 test data i...

9 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc UPA AND CPU C LOCKS Module Clocks The module receives three differential pair low voltage PECL (LVPECL) clock signals (CPU_CLK, UPA_CLK0and UPA_CLK1) from the systemboard and te...

10 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc . LOW VOLTAGE PECL Two trace signals compose each clock: one positive signal and one negative signal. Each signal is 180-degreesout of phase with the other. Signal timing is referenced to when ...

11 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc E LECTRICAL C HARACTERISTICS Absolute Maximum Ratings [1] 1. Operation of the device at values in excess of those listed above will result in degradation or destruction of the ...

12 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc Module Power Consumption This UltraSPARC-II module requires two supply voltages. The required voltages (provided to the module) forthe V DD and V DD_CORE , are respectively 3.30V and 2.6V. The ...

13 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc UPA Data Bus SPICE Model A typical circuit for the UPA data bus and ECC signals is illustrated in Figure 4:. Figure 4. Module System Loading: Example for UPA_DATA, UPA_ECC 3.1 ...

14 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc UPA AC T IMING S PECIFICATIONS The UPA AC Timing Specifications are referenced to the UPA connector. The timing assumes that the clocksare correctly distributed, (see the section "System Cl...

15 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc The following table, "Propagation Delay, Output Hold Time Specifications," specifies the propagation delayand output hold times for the UltraSPARC™–II, 400 MHz CPU, 4.0...

16 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc M ECHANICAL S PECIFICATIONS The module components and dimensions are specified in Figure 6, Figure 7, Figure 8 and Figure 9. Figure 6. CPU Module Components Figure 7. CPU Module (Component Dime...

17 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc Figure 8. CPU Module Side View Figure 9. CPU Module Side View Dimensions NOTE: A minimum backside clearance is required for airflow cooling of the backside heatsink. Module Shr...

18 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc T HERMAL S PECIFICATIONS The maximum CPU operating frequency and I/O timing is reduced when the junction temperature (Tj) of theCPU device is raised. Airflow must be directed to the CPU heatsin...

19 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc Thermal Definitions and Specifications Term Definition Specification Comments Tj Maximum devicejunctiontemperature 85 ° C, The Tj can't be measured directly by a thermo-couplep...

20 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc Temperature Estimating and Measuring Methods The following methods can be used to estimate air cooling requirements and calculate junction temperaturebased on thermo-couple temperature measurem...

22 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc JTAG T ESTABILITY The UltraSPARC™–II, 400 MHz CPU, 4.0 Mbyte module, (SME5224AUPA-400), implements the IEEE 1149.1standard to aid in board level testing. Boundary Scan Description Language (BSD...

23 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc JTAG (IEEE 1149.1) T IMING Figure 10. Voltage Waveforms - Setup and Hold Times Data Input t H 1.5V V IH V IL Clock t SU 2.0V V IH V IL 1.5V Figure 11. Voltage Waveforms - Propa...

24 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc UPA C ONNECTOR P IN A SSIGNMENTS (T OP V IEW ) Pin 1 (Pin 4) UPA_ADDR[1] (Pin 1) UPA_ADDR[0] (Pin 10) UPA_ADDR[3] (Pin 7) UPA_ADDR[2] UPA_ADDR[4] UPA_ADDR[6] UPA_ADDR[16] UPA_ADDR[18] UPA_ADDR[...

26 SME5224AUPA-400 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module July 1999 Sun Microsystems, Inc H ANDLING CPU M ODULES CAUTION: Handle a module by carefully holding it by its edges and by the large CPU heatsink. Do notbump or handle the SRAM heatsinks because this action can cause unseen ...

27 400 MHz CPU, 4.0 MB E-Cache UltraSPARC ™ -II CPU Module SME5224AUPA-400 Advanced Version July 1999 Sun Microsystems, Inc O RDERING I NFORMATION [1] 1. To order the data sheet for this device use the document part number: 805-6390-05 Part Number CPU Speeds Description SME5224AUPA-400 400 MHz CPU T...

DATASHEET 1 SME5224AUPA-400 UltraSPARC ™ -II CPU Module 400 MHz CPU, 4.0 MB E-Cache M ODULE D ESCRIPTION The UltraSPARC™–II, 400 MHz CPU, 4.0 Mbyte module, (SME5224AUPA-400) delivers high performancecomputing in a compact design. Based on the UltraSPARC™-II CPU, this module is designed using a small...