Page 4 - FCC/DOC Radio Frequency Interference Compliance; Federal Communications Commission
FCC/DOC Radio Frequency Interference Compliance This equipment generates and uses radio frequency energy and, if not installed and used in strict accordance with theinstructions in this manual, may cause interference to radio and television reception. This equipment has been testedand found to compl...
Page 5 - Contents; About This Manual; xi
© National Instruments Corporation v VXI-MXI User Manual Contents About This Manual ............................................................................................................... xi Organization of This Manual ............................................................................
Page 7 - Glossary
Contents © National Instruments Corporation vii VXI-MXI User Manual Chapter 6Theory of Operation .......................................................................................................... 6-1 VMEbus Address and Address Modifier Transceivers ..............................................
Page 8 - Figures
Contents VXI-MXI User Manual viii © National Instruments Corporation Figures Figure 1-1. VXI-MXI Interface Module ............................................................................. 1-2 Figure 1-2. VXI-MXI Interface Module with INTX Option ............................................... 1-...
Page 9 - Tables
Contents © National Instruments Corporation ix VXI-MXI User Manual Figure 6-1. Master to Slave VMEbus/MXIbus Transfers ................................................... 6-7 Figure 6-2. Deadlock Situation ............................................................................................ 6...
Page 10 - Organization of This Manual; The VXI-MXI User Manual is organized as follows:
© National Instruments Corporation xi VXI-MXI User Manual About This Manual The VXI-MXI User Manual describes the functional, physical, and electrical aspects of theVXI-MXI and contains information concerning its operation and programming. Organization of This Manual The VXI-MXI User Manual is organ...
Page 11 - How to Use This Manual
About This Manual VXI-MXI User Manual xii © National Instruments Corporation How to Use This Manual If you will be installing your VXI-MXI into a system with a VXIbus Resource Manager, youonly need to read Chapters 1 through 3 of this manual. If you have more than two VXI-MXIsextending your system, ...
Page 15 - Overview; Supports dynamic configuration of VXIbus devices
General Information Chapter 1 VXI-MXI User Manual 1-4 © National Instruments Corporation Overview The VXI-MXI is an extended class Register-Based VXIbus device with optional Slot 0 capabilityso that it can reside in any slot in a C-size or D-size VXIbus chassis. The VXI-MXI convertsA32, A24, A16, D3...
Page 16 - Front Panel Features; FAILED LED indicates that the VMEbus SYSFAIL line is asserted.
Chapter 1 General Information © National Instruments Corporation 1-5 VXI-MXI User Manual – Data transfer bus arbiter (PRI ARBITER) – Interrupt acknowledge daisy-chain driver – Pushbutton system reset switch • VMEbus master capabilities: – Access to A16, A24, and A32 address space – D08(EO), D16, and...
Page 17 - What Your Kit Should Contain; Your VXI-MXI kit should contain the following components:; Component; Standard VXI-MXI Interface Module; Optional Equipment; Equipment
General Information Chapter 1 VXI-MXI User Manual 1-6 © National Instruments Corporation What Your Kit Should Contain Your VXI-MXI kit should contain the following components: Component Part Number Standard VXI-MXI Interface Module 181045-01 or Enhanced VXI-MXI Interface Module with INTX option 1810...
Page 18 - Unpacking; Follow these steps when unpacking your VXI-MXI:
Chapter 1 General Information © National Instruments Corporation 1-7 VXI-MXI User Manual The following optional equipment is also available and may be necessary if your VXI-MXIincludes the INTX daughter card. Equipment Part Number Type INTX1 CablesStraight-point connector to straight-point connector...
Page 19 - Chapter; Electrical Characteristics; Driver Device; SYSCLK
© National Instruments Corporation 2-1 VXI-MXI User Manual Chapter 2 General Description This chapter contains the physical and electrical specifications for the VXI-MXI and describesthe characteristics of key interface board components. Electrical Characteristics All integrated circuit drivers and ...
Page 20 - VMEbus Modules
General Description Chapter 2 VXI-MXI User Manual 2-2 © National Instruments Corporation Table 2-1. VXI-MXI VMEbus Signals (Continued) Driver Device Receiver Device Bus Signals Part Number Part Number IACKIN* – LS540 IACKOUT* GAL20V8 – IRQ[7-1]* AS760, LS145 LS540 All MXIbus transceivers meet the re...
Page 21 - Compliance Notation
Chapter 2 General Description © National Instruments Corporation 2-3 VXI-MXI User Manual The VXI-MXI does not support the following VMEbus modules: • Serial Clock Driver • Power Monitor Table 2-3 indicates the VXI-MXI VMEbus compliance levels. Table 2-3. VXI-MXI VMEbus Compliance Levels Compliance N...
Page 23 - VXI-MXI Functional Description
Chapter 2 General Description © National Instruments Corporation 2-5 VXI-MXI User Manual VXI-MXI Functional Description In simplest terms, the VXI-MXI can be thought of as a bus translator that converts VXIbussignals into appropriate MXIbus signals. From the perspective of the MXIbus, the VXI-MXIimp...
Page 24 - Daughter Card Connection; VXIbus
General Description Chapter 2 VXI-MXI User Manual 2-6 © National Instruments Corporation SYSFAIL* SYSRESET* ACFAIL* VMEbus IRQ7-1 IRQ* Interrupt Circuitry SYSFAIL, ACFAIL, SYSRESET Logic Daughter Card Connection IRQ7-1 VMEbus Address and Address Modifiers Transceivers A31-1 A32 Window A24 Window A16...
Page 26 - INTX Registers
General Description Chapter 2 VXI-MXI User Manual 2-8 © National Instruments Corporation The following information applies only to VXI-MXI kits that include the INTX daughter cardoption. Figure 2-2 is a block diagram of the circuitry of the INTX daughter card. INTX Registers Interrupt Control Trigge...
Page 27 - Interrupt Control
Chapter 2 General Description © National Instruments Corporation 2-9 VXI-MXI User Manual • Interrupt Control The interrupt control logic maps the VMEbusinterrupt lines to and from the correspondingINTX interrupt lines. In conjunction with theVXI-MXI circuitry, the interrupt requests routedbetween VX...
Page 28 - Configuring the VXI-MXI
© National Instruments Corporation 3-1 VXI-MXI User Manual Chapter 3Configuration and Installation This chapter describes the configuration and installation of the VXI-MXI. Configuring the VXI-MXI Before installing the VXI-MXI in the VXIbus mainframe, configure the VXI-MXI to suit theneeds for your ...
Page 31 - The Metal Enclosure
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-4 © National Instruments Corporation The Metal Enclosure The VXI-MXI is housed in a metal enclosure to improve EMC performance and to provide easyhandling. Because the enclosure includes cut-outs to facilitate changes to switch and jumpe...
Page 33 - VXIbus Logical Address; Figure 3-5 shows switch settings for logical address hex 1 and C0.
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-6 © National Instruments Corporation VXIbus Logical Address Each device in a VXIbus/MXIbus system is assigned a unique number between 0 and 254. This8-bit number, called the logical address, defines the base address for the configuration...
Page 34 - VMEbus Request Level
Chapter 3 Configuration and Installation © National Instruments Corporation 3-7 VXI-MXI User Manual Shown atDefault settingof Logical Address 1 LOGICAL ADDRESS SWITCH Push this side down for logic 0Push this side down for logic 1 OFF ON 1 2 3 4 56 7 8 OFF 1 2 3 4 5 6 7 8 a. Switch Setting to Default...
Page 35 - Figure 3-6. VMEbus Requester Jumper Settings; VMEbus Timeout Value
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-8 © National Instruments Corporation a. Level 3 Requester (default) • • • • • • • • • • • • • • • • VMEbus Request Level • • • • • • • • b. Level 2 Requester • • • • • • • • • • • • • • • • VMEbus Request Level • • • • • • • • c. Level 1...
Page 36 - Figure 3-7. VMEbus Timeout Value Selection
Chapter 3 Configuration and Installation © National Instruments Corporation 3-9 VXI-MXI User Manual configuration allows VXIbus transfers to have short bus timeout values and MXIbus transfers tohave much longer timeout values. You can either disable the VMEbus timeout value or set it to 100, 200, or...
Page 37 - VMEbus Timeout Chain Position; VME BTO
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-10 © National Instruments Corporation VMEbus Timeout Chain Position The VME BTO Chain Position jumper block indicates the location of the VXI-MXI interface inrelation to other VXI-MXIs installed in the mainframe. If only one VXI-MXI is i...
Page 40 - Interlocked Arbitration Mode
Chapter 3 Configuration and Installation © National Instruments Corporation 3-13 VXI-MXI User Manual Interlocked Arbitration Mode Interlocked arbitration mode is an optional mode of operation in which the system performs asone large VXIbus mainframe with only one master of the entire system (VXIbus ...
Page 41 - Interlocked Bus Cycles; Figure 3-11. Interlocked Arbitration Mode Selection; MXIbus System Controller
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-14 © National Instruments Corporation Select interlocked arbitration mode by changing the default setting of the slide switch fromNormal to Interlocked Bus Cycles as shown in Figure 3-11. Interlocked Bus Cycles Normal S3 a. Normal Operat...
Page 42 - MXIbus System Controller Enabled; Figure 3-12. MXIbus System Controller Selection
Chapter 3 Configuration and Installation © National Instruments Corporation 3-15 VXI-MXI User Manual MXIbus System Controller Enabled Disabled S4 a. Not MXIbus System Controller (Default Setting) MXIbus System Controller Enabled Disabled S4 b. MXIbus System Controller Figure 3-12. MXIbus System Cont...
Page 43 - MXIbus System Controller Timeout; Figure 3-13. MXIbus System Controller Timeout Value Selection
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-16 © National Instruments Corporation MXIbus System Controller Timeout The MXIbus System Controller is also responsible for the MXIbus system timeout. The timeoutperiod begins when a MXIbus data strobe (DS) is received. The period stops ...
Page 44 - MXIbus Fairness Option; Fairness Enabled; Figure 3-14. MXIbus Fair Requester Selection
Chapter 3 Configuration and Installation © National Instruments Corporation 3-17 VXI-MXI User Manual MXIbus Fairness Option The MXIbus fairness feature ensures that all requesting devices will be granted use of theMXIbus. This feature prevents a high priority MXIbus device from consuming all of theM...
Page 46 - Figure 3-15. CLK10 Source Signal Options
Chapter 3 Configuration and Installation © National Instruments Corporation 3-19 VXI-MXI User Manual • • • • • • Drive CLK10 from onboard 10MHz, Slot 0 Drive CLK10 from SMB CLK10, Slot 0 Receive CLK10, Non-Slot 0 CLK10 Source Select a. Onboard 10 MHz VXI-MXI Installed in Slot 0 (Default Setting) • •...
Page 47 - EXT CLK SMB Input/Output; CLK10 in from SMB; INTX CLK10 Mapping
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-20 © National Instruments Corporation EXT CLK SMB Input/Output If you want to have synchronized CLK10 signals in multiple VXIbus mainframes, you canconnect the CLK10 signals of the two mainframes together using the EXT CLK SMB connectors...
Page 48 - Figure 3-17. INTX CLK10 Mapping Switches
Chapter 3 Configuration and Installation © National Instruments Corporation 3-21 VXI-MXI User Manual Drive CLK10 from INTX CLK10, Slot 0 (W9 and W10 must be removed) W2 W3 Do Not Drive CLK10 from INTX CLK10 INTX CLK10 Routing W1 Receive CLK10 from INTX Drive CLK10 out INTX a. CLK10 Mapping Disabled ...
Page 49 - Trigger Input Termination; None; Termination
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-22 © National Instruments Corporation The VXI-MXI must be installed in Slot 0 if you want to route the INTX CLK10 signal to theVXIbus CLK10 signal. The CLK10 Source Select jumpers on the VXI-MXI must be set toconfigure the VXI-MXI to rec...
Page 50 - Reset Signal Select; Installing the VXI-MXI Hardware
Chapter 3 Configuration and Installation © National Instruments Corporation 3-23 VXI-MXI User Manual Reset Signal Select The VXI-MXI generates a 200 ms active low pulse both on power-up and when you press thepushbutton system reset switch on the front panel. Using the Reset Signal Select slide switc...
Page 51 - MXIbus Termination; TERMPWR is not intended to provide power to any other device.
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-24 © National Instruments Corporation MXIbus Termination The MXIbus is a matched impedance bus and requires termination networks at the first and lastdevice in the MXIbus daisy-chain. These terminations minimize reflections caused byimpe...
Page 52 - Figure 3-21. MXIbus Terminating Networks; INTX Termination
Chapter 3 Configuration and Installation © National Instruments Corporation 3-25 VXI-MXI User Manual networks are not used, you should leave these internal terminators in place. If the VXI-MXI isnot going to be an end device, or if you will be using external terminators, remove theterminating resist...
Page 53 - Installation Instructions
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-26 © National Instruments Corporation If the daughter card will be the first or last device in the INTX chain (irrespective of theVXI-MXI's position in the MXIbus chain), you should leave these terminators in place. If thedaughter card i...
Page 54 - Connect MXIbus and SMB cables as required.; Connecting the INTX Cable
Chapter 3 Configuration and Installation © National Instruments Corporation 3-27 VXI-MXI User Manual • If interlocked mode is used, the VXI-MXIs must be the highest priority VMEbus requestersin their mainframe. However, one, and only one, mainframe in the MXIbus link can have ahigher priority VMEbus...
Page 55 - Connecting the MXIbus Cable
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-28 © National Instruments Corporation Connecting the MXIbus Cable MXIbus devices are daisy-chained together with MXIbus cables. Dual-ended cables arepolarized and require proper connection to function properly. The VXI-MXI uses a shielde...
Page 57 - System Power Cycling Requirements; Table 3-1 summarizes MXIbus system power cycling requirements.; System Type; Distributed
Configuration and Installation Chapter 3 VXI-MXI User Manual 3-30 © National Instruments Corporation In a properly configured MXIbus system, the first and last devices in the daisy-chain each haveonly one cable connected to their device connector. MXIbus devices that are neither the first northe las...
Page 58 - VMEbus Devices in VXIbus/MXIbus Systems
Chapter 3 Configuration and Installation © National Instruments Corporation 3-31 VXI-MXI User Manual Keep in mind that a system can contain only one device acting as the VXIbus Resource Manager(RM). It is important that the RM be run only after all other devices in the system have beenpowered on. Be...
Page 59 - Register Maps; Register Sizes
© National Instruments Corporation 4-1 VXI-MXI User Manual Chapter 4Register Descriptions This chapter contains detailed information on the use of the VXI-MXI registers, which are usedto configure and control the module's operation. All of these configuration registers areaccessible from the VMEbus ...
Page 60 - Register Name
Register Descriptions Chapter 4 VXI-MXI User Manual 4-2 © National Instruments Corporation Table 4-1. VXI-MXI Register Map Register Name Offset from Base Type Size Address (Hex) VXIbus ID Register 0 Read Only 16-bit Device Type Register 2 Read Only 16-bit VXIbus Status/Control Register 4 Read/Write ...
Page 62 - VXIbus Configuration Registers; VXIbus ID Register; Read Only; Bit; DEVCLASS
Register Descriptions Chapter 4 VXI-MXI User Manual 4-4 © National Instruments Corporation VXIbus Configuration Registers These registers are defined by the VXIbus specification for all VXIbus devices. VXIbus ID Register VXIbus Address: Base Address + 0 (hex) Attributes: Read Only R 15 14 13 12 11 1...
Page 63 - MANID
Chapter 4 Register Descriptions © National Instruments Corporation 4-5 VXI-MXI User Manual 11-0r MANID Manufacturer ID Bits This number uniquely identifies the manufacturer of the VXIbusdevice. These bits are configured in hardware as hex FF6, theVXIbus manufacturer ID number assigned to National In...
Page 64 - Device Type Register; MODEL
Register Descriptions Chapter 4 VXI-MXI User Manual 4-6 © National Instruments Corporation Device Type Register VXIbus Address: Base Address + 2 (hex) Attributes: Read Only R 15 14 13 12 11 10 9 0 0 1/0 0 1 1 1 1 8 MODEL 7 6 5 4 3 2 1 0 1 0 0 0 0 1 1 0 This register indicates how much VMEbus memory ...
Page 65 - VXIbus Status/Control Register
Chapter 4 Register Descriptions © National Instruments Corporation 4-7 VXI-MXI User Manual VXIbus Status/Control Register VXIbus Address: Base Address + 4 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 1 MODID* 1 ACCDIR 8 0 0 0 0 0 0 0 0 W R 7 6 5 4 3 2 1 RDY PASS 1 RESET 0 0 0 0 0 0 0 0 RESET W...
Page 67 - VXIbus Extender Registers; MODID Register
Chapter 4 Register Descriptions © National Instruments Corporation 4-9 VXI-MXI User Manual VXIbus Extender Registers These registers are defined for VXIbus extender devices. MODID Register VXIbus Address: Base Address + 8 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 0 0 OUTEN MODID12 MODID11...
Page 68 - Logical Address Window Register
Register Descriptions Chapter 4 VXI-MXI User Manual 4-10 © National Instruments Corporation Logical Address Window Register VXIbus Address: Base Address + A (hex) Attributes: Read/Write This register defines the range of logical addresses that are mapped into and out of the VXI-MXIthrough the MXIbus...
Page 69 - LAEN
Chapter 4 Register Descriptions © National Instruments Corporation 4-11 VXI-MXI User Manual LAEN LADIR Window Applies to 0 X Disabled 1 0 VXI cycles to MXI cycles 1 MXI cycles to VXI cycles 12-11r/w 1 Reserved Bits These bits are reserved and read back as ones. Write a zero whenwriting to these bits...
Page 70 - Logical Address Window Upper Bound Bits
Register Descriptions Chapter 4 VXI-MXI User Manual 4-12 © National Instruments Corporation The Logical Address Window Register has the following format when the CMODE bit is set: R/W 7 6 5 4 3 2 1 LALOW7 LALOW6 LALOW5 LALOW4 LALOW3 LALOW2 LALOW1 LALOW0 0 15 14 13 12 11 10 9 8 R/W LAHIGH7 LAHIGH6 LA...
Page 72 - A16 Window Map Register; Reserved
Register Descriptions Chapter 4 VXI-MXI User Manual 4-14 © National Instruments Corporation A16 Window Map Register VXIbus Address: Base Address + C (hex) Attributes: Read/Write This register defines the range of addresses in the lower 48 KB of A16 space that is mapped intoand out of the VXI-MXI thr...
Page 73 - Window Applies to
Chapter 4 Register Descriptions © National Instruments Corporation 4-15 VXI-MXI User Manual A16EN A16DIR Window Applies to 0 X Disabled 1 0 VXI cycles to MXI cycles 1 MXI cycles to VXI cycles 12-11r/w 1 Reserved Bits These bits are reserved and read back as ones. Write a zero whenwriting to these bi...
Page 74 - A16 Window Upper Bound Bits
Register Descriptions Chapter 4 VXI-MXI User Manual 4-16 © National Instruments Corporation The A16 Window Map Register has the following format when the CMODE bit is set: R/W 7 6 5 4 3 2 1 A16LOW7 A16LOW6 A16LOW5 A16LOW4 A16LOW3 A16LOW2 A16LOW1 A16LOW0 0 15 14 13 12 11 10 9 8 R/W A16HIGH7 A16HIGH6 ...
Page 76 - A24 Window Map Register
Register Descriptions Chapter 4 VXI-MXI User Manual 4-18 © National Instruments Corporation A24 Window Map Register VXIbus Address: Base Address + E (hex) Attributes: Read/Write This register defines the range of addresses in A24 space that are mapped into and out of theVXI-MXI through the MXIbus. T...
Page 78 - A24 Window Upper Bound
Register Descriptions Chapter 4 VXI-MXI User Manual 4-20 © National Instruments Corporation The A24 Window Map Register has the following format when the CMODE bit is set: R/W 7 6 5 4 3 2 1 A24LOW7 A24LOW6 A24LOW5 A24LOW4 A24LOW3 A24LOW2 A24LOW1 A24LOW0 0 15 14 13 12 11 10 9 8 R/W A24HIGH7 A24HIGH6 ...
Page 80 - A32 Window Map Register
Register Descriptions Chapter 4 VXI-MXI User Manual 4-22 © National Instruments Corporation A32 Window Map Register VXIbus Address: Base Address + 10 (hex) Attributes: Read/Write This register defines the range of addresses in A32 space that are mapped into and out of theVXI-MXI through the MXIbus. ...
Page 82 - A32 Window Upper Bound
Register Descriptions Chapter 4 VXI-MXI User Manual 4-24 © National Instruments Corporation The A32 Window Map Register has the following format when the CMODE bit is set: R/W 7 6 5 4 3 2 1 A32LOW7 A32LOW6 A32LOW5 A32LOW4 A32LOW3 A32LOW2 A32LOW1 A32LOW0 0 15 14 13 12 11 10 9 8 R/W A32HIGH7 A32HIGH6 ...
Page 84 - INTX Interrupt Configuration Register (on VXI-MXIs with INTX only)
Register Descriptions Chapter 4 VXI-MXI User Manual 4-26 © National Instruments Corporation INTX Interrupt Configuration Register (on VXI-MXIs with INTX only) VXIbus Address: Base Address + 12 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 0 EINT7EN EINT6EN EINT5EN EINT4EN EINT3EN EINT2EN EINT...
Page 85 - INTX Trigger Configuration Register (on VXI-MXIs with INTX only); Extended Trigger Enable Bits
Chapter 4 Register Descriptions © National Instruments Corporation 4-27 VXI-MXI User Manual INTX Trigger Configuration Register (on VXI-MXIs with INTX only) VXIbus Address: Base Address + 14 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 ETRG7EN ETRG6EN ETRG5EN ETRG4EN ETRG3EN ETRG2EN ETRG1EN ...
Page 86 - INTX Utility Configuration Register (on VXI-MXIs with INTX only)
Register Descriptions Chapter 4 VXI-MXI User Manual 4-28 © National Instruments Corporation INTX Utility Configuration Register (on VXI-MXIs with INTX only) VXIbus Address: Base Address + 18 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 0 1 1 0 1 1 1 1 8 R/W 7 6 5 4 3 2 1 1 1 ACFAILIN ACFAILOUT...
Page 88 - Subclass Register; Read only; Manufacturer
Register Descriptions Chapter 4 VXI-MXI User Manual 4-30 © National Instruments Corporation Subclass Register VXIbus Address: Base Address + 1E (hex) Attributes: Read only R 15 14 13 12 11 10 9 1 1 1 1 1 1 1 0 8 SUBCLASS 7 6 5 4 3 2 1 0 1 1 1 1 1 1 1 0 These bits define the subclass of a VXIbus exte...
Page 89 - MXIbus Defined Registers; MXIbus Status/Control Register; RMWMODE
Chapter 4 Register Descriptions © National Instruments Corporation 4-31 VXI-MXI User Manual MXIbus Defined Registers MXIbus Status/Control Register VXIbus Address: Base Address + 20 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 1 1 MXSCTO INTLCK DSYSFAIL FAIR 8 DSYSFAIL DSYSRST W R 7 6 5 4 3 2 ...
Page 91 - ECLxEN; Routing
Chapter 4 Register Descriptions © National Instruments Corporation 4-33 VXI-MXI User Manual 11r MXSCTO MXIbus System Controller Timeout Status Bit If this VXI-MXI is the MXIbus System Controller, this bit is set ifthe VXI-MXI sent a MXIbus BERR on the last MXIbus transfer inresponse to a MXIbus Syst...
Page 94 - MXIbus Lock Register; Reserved
Register Descriptions Chapter 4 VXI-MXI User Manual 4-36 © National Instruments Corporation MXIbus Lock Register VXIbus Address: Base Address + 22 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 1 1 1 1 1 1 1 1 8 0 0 0 0 0 0 0 0 W R 7 6 5 4 3 2 1 1 1 1 1 1 1 1 LOCKED 0 0 0 0 0 0 0 0 W LOCKED The ...
Page 95 - MXIbus IRQ Configuration Register
Chapter 4 Register Descriptions © National Instruments Corporation 4-37 VXI-MXI User Manual MXIbus IRQ Configuration Register VXIbus Address: Base Address + 24 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 SYSFOUT MIRQ7EN MIRQ6EN MIRQ5EN MIRQ4EN MIRQ3EN MIRQ2EN MIRQ1EN 8 R/W 7 6 5 4 3 2 1 SYS...
Page 96 - MIRQxEN; Disabled
Register Descriptions Chapter 4 VXI-MXI User Manual 4-38 © National Instruments Corporation MIRQxEN MIRQxDIR Routing 0 X Disabled 1 0 VME IRQ X drives MXI IRQ 1 MXI IRQ drives VME IRQ X
Page 97 - Drive Triggers/Read LA Register
Chapter 4 Register Descriptions © National Instruments Corporation 4-39 VXI-MXI User Manual Drive Triggers/Read LA Register VXIbus Address: Base Address + 26 (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 DTRIG7 DTRIG6 DTRIG5 DTRIG4 DTRIG3 DTRIG2 DTRIG1 DTRIG0 8 R 7 6 5 4 3 2 1 LADD7 LADD6 LAD...
Page 98 - DRVECL1
Register Descriptions Chapter 4 VXI-MXI User Manual 4-40 © National Instruments Corporation 1w DRVECL1 Drive ECL Trigger Line 1 Bit Setting this bit asserts the VXIbus ECL Trigger Line 1 aftersynchronizing the signal with the 10 MHz clock. 0w DRVECL0 Drive ECL Trigger Line 0 Setting this bit asserts...
Page 99 - Trigger Mode Selection Register
Chapter 4 Register Descriptions © National Instruments Corporation 4-41 VXI-MXI User Manual Trigger Mode Selection Register VXIbus Address: Base Address + 28 (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 1 1 1 1 1 1 1 1 8 ITS2 ITS1 ITS0 W R 7 6 5 4 3 2 1 1 1 TRIGIN TRIGOUT ASINT* SSINT* 0 0 ASI...
Page 100 - Trigger Line
Register Descriptions Chapter 4 VXI-MXI User Manual 4-42 © National Instruments Corporation When in Sync, Semi-Sync, or Async Source Mode, write a zero tothe PULSE bit in the Drive Triggers Register to generate a pulseon the trigger line selected by the OTS[3-0] bits. You must write aone to the PULS...
Page 103 - Interrupt Status/Control Register
Chapter 4 Register Descriptions © National Instruments Corporation 4-45 VXI-MXI User Manual Interrupt Status/Control Register VXIbus Address: Base Address + 2A (hex) Attributes: Read/Write R 15 14 13 12 11 10 9 LINT3 LINT2 LINT1 BKOFF TRIGINT SYSFAIL ACFAIL 8 LINT3 LINT2 LINT1 0 BKOFFIE TRIGINTIE SY...
Page 107 - MXIbus Trigger Configuration Register; Trigger Enable Bits
Chapter 4 Register Descriptions © National Instruments Corporation 4-49 VXI-MXI User Manual MXIbus Trigger Configuration Register VXIbus Address: Base Address + 2E (hex) Attributes: Read/Write R/W 15 14 13 12 11 10 9 TRIG7EN TRIG6EN TRIG5EN TRIG4EN TRIG3EN TRIG2EN TRIG1EN TRIG0EN 8 R/W 7 6 5 4 3 2 1...
Page 108 - Trigger Synchronous Acknowledge Register; Trigger Asynchronous Acknowledge Register; Write Only
Register Descriptions Chapter 4 VXI-MXI User Manual 4-50 © National Instruments Corporation Trigger Synchronous Acknowledge Register VXIbus Address: Base Address + 34 (hex) Attributes: Write Only W 15 14 13 12 11 10 9 X X X X X X X X 8 W 7 6 5 4 3 2 1 X X X X X X X X 0 Writing any value to this regi...
Page 109 - IRQ Acknowledge Registers; Interrupt Acknowledge Status/ID
Chapter 4 Register Descriptions © National Instruments Corporation 4-51 VXI-MXI User Manual IRQ Acknowledge Registers VXIbus Address: Base Address + 32 (hex) for IRQ1*Base Address + 34 (hex) for IRQ2*Base Address + 36 (hex) for IRQ3*Base Address + 38 (hex) for IRQ4*Base Address + 3A (hex) for IRQ5*B...
Page 110 - System Configuration; Planning a VXIbus/MXIbus System Logical Address Map
© National Instruments Corporation 5-1 VXI-MXI User Manual Chapter 5Programming Considerations This chapter explains important considerations for programming and configuring a VXIbus/MXIbus system using VXI-MXIs. Note: Detailed descriptions of all register bits can be found in Chapter 4, RegisterDes...
Page 112 - Multiple VXI-MXIs in a mainframe must be in adjacent slots.; Base/Size Configuration Format
Chapter 5 Programming Considerations © National Instruments Corporation 5-3 VXI-MXI User Manual The recommended way to set up your system is to fill up Level 1 MXIbus links before addingadditional levels. System performance decreases as the number of levels in the system increasesbecause each level ...
Page 113 - Figure 5-4. Address Range Allocation for Different Size Values
Programming Considerations Chapter 5 VXI-MXI User Manual 5-4 © National Instruments Corporation Base7 Size = 1 Size = 2 Size = 3 Size = 4 Size = 5 Size = 6 Size = 7 Base6 Base5 Base4 Base3 Base2 Base1 Base0 Figure 5-3. Base and Size Combinations FF-F0 EF-E0 DF-D0 CF-C0 BF-B0 AF-A0 9F-90 8F-807F-70 6...
Page 114 - High/Low Configuration Format
Chapter 5 Programming Considerations © National Instruments Corporation 5-5 VXI-MXI User Manual High/Low Configuration Format Each address mapping window on a MXIbus interface has High and Low address parametersassociated with it when the CMODE bit in the MXIbus Control Register is set. The High and...
Page 117 - Level 1; MXIbus Device A
Programming Considerations Chapter 5 VXI-MXI User Manual 5-8 © National Instruments Corporation VXIbus Mainframe #1 VXI-MXI VXI-MXI VXIbus Mainframe #2 VXI-MXI MXIbus Device A MXIbus Device B VXIbus Mainframe #3 VXI-MXI VXI-MXI VXIbus Mainframe #6 VXI-MXI VXIbus Mainframe #4 VXI-MXI VXIbus Mainframe...
Page 118 - Device A
Chapter 5 Programming Considerations © National Instruments Corporation 5-9 VXI-MXI User Manual Into VXIbus Mainframe #3 FF-F0 EF-E0 DF-D0 CF-C0 BF-B0 AF-A0 9F-90 8F-807F-70 6F-605F-50 3F-30 4F-40 2F-20 1F-10 0F-00 VXIbus Mainframe #1 VXIbus Mainframe #6 VXIbus Mainframe #3 VXIbus Mainframe #4 VXIbu...
Page 119 - VXIbus Mainframe #1; MXIbus #1; MXIbus #2
Programming Considerations Chapter 5 VXI-MXI User Manual 5-10 © National Instruments Corporation Resource Manager Mainframe: VXIbus Mainframe #1 Total number of logical addresses required by this device: 12 Range = 0 – F Round total number up to the next power of two: * 16 (2 4 ) Size = 8-4 = 4 Firs...
Page 120 - Total Number of Logical Addresses Required:
Chapter 5 Programming Considerations © National Instruments Corporation 5-11 VXI-MXI User Manual MXIbus Link: MXIbus #1 Device: MXIbus Device A Number of logical addresses required by device: 3 Range = E0 – E3 Round total number up to the next power of two: 4 (2 2 ) Size = 8-2 = 6 List other MXIbus ...
Page 121 - VXIbus Mainframe #6; VXIbus Mainframe #4
Programming Considerations Chapter 5 VXI-MXI User Manual 5-12 © National Instruments Corporation MXIbus Link: MXIbus #2 Device: VXIbus Mainframe #6 Number of logical addresses required by device: 7 Range = 10 – 17 Round total number up to the next power of two: 8 (2 3 ) Size = 8-3 = 5 List other MXI...
Page 122 - Worksheets for Planning Your VXIbus/MXIbus Logical Address Map
Chapter 5 Programming Considerations © National Instruments Corporation 5-13 VXI-MXI User Manual Worksheets for Planning Your VXIbus/MXIbus Logical Address Map Use the worksheets on the following pages for analyzing your own VXIbus/MXIbus system.Follow the procedures used to fill out the worksheets ...
Page 129 - Planning a VXIbus/MXIbus System A16 Address Map; Table 5-3. Amount of A16 Space Allocated for all Size Values; Amount of A16 Space Allocated
Chapter 5 Programming Considerations © National Instruments Corporation 5-21 VXI-MXI User Manual Planning a VXIbus/MXIbus System A16 Address Map The VXIbus specification does not define a method for dynamically determining the amount ofA16 space each device requires. The specification defines the up...
Page 130 - Figure 5-12. A16 Space Allocations for all Size Values
Programming Considerations Chapter 5 VXI-MXI User Manual 5-22 © National Instruments Corporation BFFF-B000 AFFF-A000 9FFF-9000 8FFF-8000 7FFF-7000 6FFF-6000 5FFF-5000 4FFF-4000 3FFF-3000 2FFF-2000 1FFF-10000FFF-0000 F0 E0 C0 B0 A0 D0 90 80 50 40 00 60 70 30 20 10 Size = 2 Size = 3 Size = 4 Size = 5 ...
Page 133 - Device
Chapter 5 Programming Considerations © National Instruments Corporation 5-25 VXI-MXI User Manual Table 5-4. Example VXIbus/MXIbus System Required A16 Space Amount of A16 Device Space Required VXIbus Mainframe #1 16 KB MXIbus Device A 512 B MXIbus Device B 0 B VXIbus Mainframe #2 0 B VXIbus Mainframe...
Page 134 - Out
Programming Considerations Chapter 5 VXI-MXI User Manual 5-26 © National Instruments Corporation Resource Manager Mainframe: Amount of A16 space required for this mainframe: Round up to next address break: First Level MXIbus Link: Amount of A16 space required for devices connected to this VXI-MXI: R...
Page 136 - In
Programming Considerations Chapter 5 VXI-MXI User Manual 5-28 © National Instruments Corporation MXIbus Link: Device: Amount of A16 space required by this device: A16 space requirement for each second level MXIbus link connected to this device: #1 + #2 = Round up to next address break:Total amount o...
Page 137 - Worksheets for Planning Your VXIbus/MXIbus A16 Address Map
Chapter 5 Programming Considerations © National Instruments Corporation 5-29 VXI-MXI User Manual Worksheets for Planning Your VXIbus/MXIbus A16 Address Map Use the worksheets on the following pages for planning an A16 address map for your VXIbus/MXIbus system. Follow the procedures used to fill out ...
Page 143 - Multiframe RM Operation; Identifies all devices in the system; Configuring the Logical Address Window; address space inward and enables the window.
Chapter 5 Programming Considerations © National Instruments Corporation 5-35 VXI-MXI User Manual Multiframe RM Operation On power-up, all MXIbus devices are isolated from each other because all address mappingwindows are disabled. The multiframe RM performs the following: • Identifies all devices in...
Page 144 - Configuring the Logical Address Window Example; Multiframe RM
Programming Considerations Chapter 5 VXI-MXI User Manual 5-36 © National Instruments Corporation b. Repeats Step 2 recursively. c. Sets the VXI-MXI inward logical address mapping window to cover the range up to (but not including) the VXI-MXI with the next highest logical address thatwas found in th...
Page 145 - The RM performs the following steps:
Chapter 5 Programming Considerations © National Instruments Corporation 5-37 VXI-MXI User Manual The RM performs the following steps: 1. Scans logical addresses (0 to FF) and identifies all devices in VXIbus Mainframe #1. Finds the VXI-MXIs at logical addresses 2 and 4 and moves DC devices to the lo...
Page 146 - Configuring the A24 and A32 Addressing Windows
Programming Considerations Chapter 5 VXI-MXI User Manual 5-38 © National Instruments Corporation 9. Enables the logical address window of the VXI-MXI in VXIbus Mainframe #2 for the entire inward mapping range of 0 to FF. Scans all logical addresses, skipping all previouslyencountered devices and def...
Page 147 - System Administration and Initiation
Chapter 5 Programming Considerations © National Instruments Corporation 5-39 VXI-MXI User Manual System Administration and Initiation System self-test administration, hierarchy configuration, and initiation of normal operation arehandled as defined in the VXIbus specification. A general-purpose mult...
Page 148 - VMEbus Address and Address Modifier Transceivers
© National Instruments Corporation 6-1 VXI-MXI User Manual Chapter 6Theory of Operation A brief description of the VXI-MXI is given in Chapter 2 along with a functional block diagram(see Figure 2-1). The major elements of the VXI-MXI are discussed in more detail in thischapter. For a detailed discus...
Page 149 - VMEbus Control Signals Transceivers
Theory of Operation Chapter 6 VXI-MXI User Manual 6-2 © National Instruments Corporation VMEbus Control Signals Transceivers The VMEbus control signals transceivers control the sending and receiving of the VMEbuscontrol signals such as address strobe (AS*), the data strobes (DS1*, DS0*), longword(LW...
Page 150 - Interrupt Circuitry
Chapter 6 Theory of Operation © National Instruments Corporation 6-3 VXI-MXI User Manual The Synchronous protocol is a single trigger line broadcast that does not require an acknowledgefrom its acceptors. The source must assert the trigger for a minimum of 30 ns and allow at least50 ns between asser...
Page 152 - VMEbus IRQ Line
Chapter 6 Theory of Operation © National Instruments Corporation 6-5 VXI-MXI User Manual Multiple MXIbus devices can interrupt on the same interrupt line; therefore, a MXIbus interruptacknowledge daisy-chain is required. The MXIbus GIN and GOUT signals are normally usedfor the arbitration bus grant ...
Page 153 - Parity Check and Generation
Theory of Operation Chapter 6 VXI-MXI User Manual 6-6 © National Instruments Corporation The VMEbus interrupt lines can be individually driven by writing to the Interrupt Status/ControlRegister. When one of these interrupt requests is serviced by an interrupt handler, theinformation in the Status/ID...
Page 154 - Master; Slave; VMEbus Address
Chapter 6 Theory of Operation © National Instruments Corporation 6-7 VXI-MXI User Manual complete when the responding device sends DTACK* and the VXI-MXI releases the data strobeand address strobe. The VXI-MXI interface supports 8-bit, 16-bit, and 32-bit reads and writesacross the MXIbus. The least ...
Page 155 - Transfer Type
Theory of Operation Chapter 6 VXI-MXI User Manual 6-8 © National Instruments Corporation Table 6-3. Transfer Responses for VMEbus Address Modifiers AM5 AM4 AM3 AM2 AM1 AM0 Transfer Type H H H H H H A24 supervisory block transfer H H H H H L A24 supervisory program access H H H H L H A24 supervisory ...
Page 156 - VMEbus
Chapter 6 Theory of Operation © National Instruments Corporation 6-9 VXI-MXI User Manual Table 6-4. VMEbus/MXIbus Transfer Size Comparison VMEbus MXIbus Byte Locations DS1* DS0* A01 LWORD* Size AD01 AD00 D24-31 D16-23 D08-15 D00-07 8-bit Transfers Byte(0) 0 1 0 1 0 0 0 Byte(0) Byte(1) 1 0 0 1 0 0 1 ...
Page 157 - MXIbus Slave Mode State Machine
Theory of Operation Chapter 6 VXI-MXI User Manual 6-10 © National Instruments Corporation VXI-MXI VXI-MXI VXIbus Mainframe #1 VXIbus Mainframe #2 MXIbus VMEbus VMEbus Slave Slave Master Master Slave Slave Figure 6-2. Deadlock Situation If the VXI-MXI responds with a VMEbus BERR* to a transfer initia...
Page 158 - MXIbus Address/Data and Address Modifier Transceivers
Chapter 6 Theory of Operation © National Instruments Corporation 6-11 VXI-MXI User Manual Table 6-3. When a transfer involving an address in one of the inward windows is detected, theVXI-MXI begins arbitrating for the VMEbus. When the VXI-MXI wins the VMEbus, theMXIbus transfer is converted into a V...
Page 159 - MXIbus System Controller Functions
Theory of Operation Chapter 6 VXI-MXI User Manual 6-12 © National Instruments Corporation MXIbus specifies trapezoidal bus transceivers to reduce noise and crosstalk in the MXIbustransmission system. These transceivers have open collector drivers that generate precisetrapezoidal waveforms with typic...
Page 162 - Capability Codes; Capability Code
© National Instruments Corporation A-1 VXI-MXI User Manual Appendix ASpecifications Capability Codes VMEbus Capability Code Description MA32, MA24, MA16 Master Mode A32, A24, and A16 addressing SA32, SA24, SA16 Slave Mode A32, A24, and A16 addressing MD32, MD16, MD08(EO) Master Mode D32, D16, and D0...
Page 163 - MXIbus; Electrical
Specifications Appendix A VXI-MXI User Manual A-2 © National Instruments Corporation MXIbus Capability Code Description MA32, MA24, MA16 Master Mode A32, A24, and A16 addressing SA32, SA24, SA16 Slave Mode A32, A24, and A16 addressing MD32, MD16, MD08(EO) Master Mode D32, D16, and D08 data sizes SD3...
Page 164 - Physical; Master Mode; Other
Appendix A Specifications © National Instruments Corporation A-3 VXI-MXI User Manual Safety Not applicable Shock and Vibration Not applicable Physical Board size Fully shielded VXI C-size board(9.187 in. by 13.386 in.; 233.35 mm by 340 mm) Connectors Single fully implemented MXIbus connectorSingle I...
Page 171 - Removing the Metal Enclosure from the VXI-MXI; right side panel of the enclosure.
© National Instruments Corporation C-1 VXI-MXI User Manual Appendix CVXI-MXI Component Placement This appendix contains instructions on opening the VXI-MXI module, and removing andreinstalling the optional INTX daughter card. This appendix also contains parts locator diagramsof the VXI-MXI and the I...
Page 173 - Removing the INTX Daughter Card from the VXI-MXI; Remove the three screws on the top of the daughter card.
Appendix C VXI-MXI Component Placement © National Instruments Corporation C-3 VXI-MXI User Manual Removing the INTX Daughter Card from the VXI-MXI Under normal circumstances you will not need to remove the INTX card from the VXI-MXImodule. You have easy access to the INTX terminators and CLK10 mappi...
Page 174 - Installing the INTX Daughter Card onto the VXI-MXI
VXI-MXI Component Placement Appendix C VXI-MXI User Manual C-4 © National Instruments Corporation Figure C-3 is a parts locator diagram of the front side of the INTX daughter card, showing thelocation of the various components. Figure C-3. VXI-MXI INTX Parts Locator Diagram (Front View) Installing t...
Page 175 - MXIbus Connector; Table D-1. MXIbus Connector Signal Assignments
© National Instruments Corporation D-1 VXI-MXI User Manual Appendix DConnector Descriptions This appendix describes the connector pin assignments for the MXIbus connector and the INTXconnector. MXIbus Connector The MXIbus signals are assigned to the device connector as shown in Figure D-1 and Table ...
Page 176 - Category; GND
Connector Descriptions Appendix D VXI-MXI User Manual D-2 © National Instruments Corporation The MXIbus defines 49 active signals, 12 ground lines, and 1 line for terminator power. TableD-2 describes the signals on the MXIbus connector and groups them in five categories. Table D-2. MXIbus Signal Gro...
Page 177 - INTX Connector; Table D-3. INTX Connector Signal Assignments
Appendix D Connector Descriptions © National Instruments Corporation D-3 VXI-MXI User Manual INTX Connector The INTX connector is used only on VXI-MXIs with the INTX daughter card option. The INTXsignals are assigned to the device connector as shown in Figure D-2 and Table D-3. 44 43 42 41 40 39 38 ...
Page 179 - Configuring VXI-MXIs for a Two-Frame System
© National Instruments Corporation E-1 VXI-MXI User Manual Appendix EConfiguring a Two-Frame System This appendix describes how to configure a system containing two mainframes linked byVXI-MXI modules. Configuring VXI-MXIs for a Two-Frame System The factory configuration of the VXI-MXI is suitable f...
Page 184 - Configuration Requirements for Two-Frame System; BTO Unit
Configuring a Two-Frame System Appendix E VXI-MXI User Manual E-6 © National Instruments Corporation Configuration Requirements for Two-Frame System This section contains miscellaneous information you need to consider as you configure atwo-frame system. BTO Unit Notice that although the VXI-MXI in F...
Page 186 - Technical Support Form
Technical Support Form Photocopy this form and update it each time you make changes to your software or hardware, and use the completedcopy of this form as a reference for your current configuration. Completing this form accurately before contactingNational Instruments for technical support helps ou...
Page 187 - National Instruments Products
VXI-MXI Hardware and SoftwareConfiguration Form Record the settings and revisions of your hardware and software on the line to the right of each item. Complete anew copy of this form each time you revise your software or hardware configuration, and use this form as areference for your current config...
Page 188 - Other Products
Other Products • Other MXIbus Devices in System Manufacturer Model Function Slot Logical Address • Other VXIbus Devices Manufacturer Model Function Slot Logical Address • Address Space(s) and Size(s) of Other Devices: _________________________________________________ ________________________________...
Page 189 - Documentation Comment Form
Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. Thisinformation helps us provide quality products to meet your needs. Title: VXI-MXI User Manual Edition Date: October 1993 Part Number: 320222-01 Please comment on the complete...
Page 190 - Prefix; Symbols
© National Instruments Corporation Glossary-1 VXI-MXI User Manual Glossary ___________________________________________________ Prefix Meaning Value n- nano- 10 -9 µ- micro- 10 -6 m- milli- 10 -3 K- kilo- 10 3 M- mega- 10 6 g- giga- 10 9 Symbols ° degrees ohms % percent ± plus or minus A A amperes A1...
Page 195 - Normal Operating Mode an optional mode of operation
Glossary VXI-MXI User Manual Glossary-6 © National Instruments Corporation I IACK Interrupt Acknowledge IC Integrated Circuit IEEE Institute of Electrical and Electronics Engineers IEEE 1014 The VME specification. in. inches I/O input/output; the techniques, media, and devices used to achievecommuni...
Page 201 - I n d e x; planning VXIbus/MXIbus system A16
© National Instruments Corporation Index-1 VXI-MXI User Manual I n d e x A A16 Window Map Register, 4-14 to 4-17 bit descriptions, 4-14 to 4-15, 4-16definition, 2-7description, 4-14example, 4-15format CMODE bit cleared, 4-14CMODE bit set, 4-16 planning VXIbus/MXIbus system A16 address map examples, ...
Page 202 - Extended P3 ECL Trigger Line Support
Index VXI-MXI User Manual Index-2 © National Instruments Corporation A32EN, 4-22, 4-23A32HIGH[7-0], 4-24A32LOW[7-0], 4-24A32SIZE[2-0], 4-23ACCDIR, 4-7ACFAIL, 4-47ACFAILIE, 4-47ACFAILIN, 4-29ACFAILINT, 4-46ACFAILOUT, 4-29ADDR, 4-4ASIE, 4-44ASINT*, 4-44BKOFF, 4-46BKOFFIE, 4-46BOFFCLR, 4-35CMODE, 4-32D...
Page 208 - See logical address map configuration.
Index VXI-MXI User Manual Index-8 © National Instruments Corporation SUBCLASS bit, 4-30Subclass Register, 4-30switches. See jumpers and switches.Synchronous protocol, 6-3SYSFAIL bit, 4-46SYSFAIL signal, 2-5, 6-3SYSFAILIE bit, 4-46SYSFAILIN bit, 4-29SYSFAILINT bit, 4-47SYSFAILOUT bit, 4-29SYSFIN bit,...