Philips SAA7345 - Manual

Philips SAA7345

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Table of Contents:

  • Page 3 – BLOCK DIAGRAM
  • Page 6 – RAME SYNC PROTECTION; Data Slicer and Clock Regenerator; CHANNEL PROCESSING
  • Page 7 – THER SUBCODE CHANNELS; s minimum. Each subcode byte; Microcontroller interface; RITING DATA TO; Write operation sequence; Fig.4 Subcode format and timing at V4 pin.
  • Page 8 – Table 1 Internal status signals.
  • Page 9 – EADING; Read subcode operation sequence; EAK DETECTOR OUTPUT
  • Page 15 – ONCEALMENT
  • Page 16 – Mute and Attenuation
  • Page 18 – CMOS digital decoding IC with RAM for
  • Page 21 – MODE; Fig.16 Motor pulse density application diagrams.; Accelerate
  • Page 22 – CDV
  • Page 23 – PERATION MODES; Table 9 Operation modes.; OWER LIMIT
  • Page 25 – BSOLUTE TIME SYNC; Double speed mode
  • Page 29 – S timing; SYMBOL
  • Page 32 – APPLICATION INFORMATION; Fig.26 Application circuits for crystal oscillator.
  • Page 34 – PACKAGE OUTLINE
  • Page 35 – “IC Package Databook”; Maximum permissible solder temperature is 260
  • Page 37 – NOTES
  • Page 40 – Philips Semiconductors – a worldwide company; Printed in The Netherlands
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DATA SHEET

Product specification
Supersedes data of 1996 Jan 09
File under Integrated Circuits, IC01

1998 Feb 16

INTEGRATED CIRCUITS

SAA7345
CMOS digital decoding IC with
RAM for Compact Disc

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About this manual

Brand
Philips
Model
SAA7345
Document type
Manual
Language(s)
English
Pages
40
File size
158 KB
Format
PDF

Summary

Page 3 - BLOCK DIAGRAM

1998 Feb 16 3 Philips Semiconductors Product specification CMOS digital decoding IC with RAM forCompact Disc SAA7345 BLOCK DIAGRAM Fig.1 Block diagram. MGA371 - 2 CFLG RAB CL DA CLA PORE KILL V3 V4 V5 MOTO2 CL11 IREF DOBM V1 V2 TEST2 TEST1 ISLICE HFIN HFREF V DDA SAA7345 MOTO1 CRIN VDD1 VSS1 CL16 MI...

Page 6 - RAME SYNC PROTECTION; Data Slicer and Clock Regenerator; CHANNEL PROCESSING

1998 Feb 16 6 Philips Semiconductors Product specification CMOS digital decoding IC with RAM forCompact Disc SAA7345 FUNCTIONAL DESCRIPTION Demodulator F RAME SYNC PROTECTION This circuit will detect the frame synchronization signals.Two synchronization counters are used in the SAA7345: 1. The coinc...

Page 7 - THER SUBCODE CHANNELS; s minimum. Each subcode byte; Microcontroller interface; RITING DATA TO; Write operation sequence; Fig.4 Subcode format and timing at V4 pin.

1998 Feb 16 7 Philips Semiconductors Product specification CMOS digital decoding IC with RAM forCompact Disc SAA7345 O THER SUBCODE CHANNELS Data of the other subcode channels (Q-to-W) may be readvia the V4 pin if the versatile pins interface register(address 1101) is set to XX01. The format is simi...

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