IBM EM78P312N - Manual

IBM EM78P312N

IBM EM78P312N – Manual, read for free online in PDF format. We hope this helps you resolve any issues you may have. If you have further questions, please contact us through the contact form.

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Table of Contents:

  • Page 2 – Copyright; 006 by ELAN Microelectronics Corporation; http
  • Page 3 – Contents; General; Purpose; Rate
  • Page 4 – iv; Maximum; Electrical; APPENDIX; A Package; Specification Revision History; Revision Description; Version
  • Page 5 – -Bit Microcontroller; Product Specification; high noise immunity; Features
  • Page 6 – Description; Table 1; Symbol
  • Page 7 – Function; Functional Block Diagram
  • Page 8 – Operating Registers
  • Page 9 – 3 bits on-chip OTP ROM addresses to the relative
  • Page 10 – PC; DC; R-Register page select; Bank; Not used
  • Page 12 – Operating Mode; Clear; Timer/Counter 4 start control
  • Page 13 – Clock Source; RD (Interrupt Status Flag Register 0 and INT3 Edge Detect Flag)
  • Page 14 – EXIF5 TCIF2 ADIF
  • Page 15 – TC3CAP; Clock source
  • Page 16 – Fc; Bank 1 R9 TC2DH (Timer 2 Data Buffer High Byte); ADREF ADRUN ADCK1 ADCK0 ADP ADIS2 ADIS1 ADIS0
  • Page 17 – Reserved; Analog Input Pin
  • Page 18 – TEN; Bank 2 R5 URC1 (UART Control Register 1); BRATE2 BRATE1 BRATE0 UTBE
  • Page 19 – BRATE2; Bank 2 R6 URC2 (UART Control Register 2); Operation Mode
  • Page 21 – Bank 3 R6 SPIC2 (SPI Control Register 2); RBF
  • Page 22 – Transfer Mode; Transmit; Bank 3 RA PHC1 (Pull High Control Register 1)
  • Page 23 – Bank 3 RC PHC2 (Pull High Control Register 2); Special Purpose Registers
  • Page 24 – I/O Port Control Register; Edge Select
  • Page 25 – Falling; ADOSCR; EXIE5 TCIE2 ADIE; EXIE3
  • Page 26 – UERRIE
  • Page 27 – CPU Operation Mode; Registers for CPU Operation Mode; SCR; Sleep Mode; Table 2. Mode Switching Control
  • Page 28 – Registers for AD Converter Circuit
  • Page 29 – ADC Data Register; s for each K; Table 5; ADCK1:0 Operation Mode
  • Page 30 – Time Base Timer and Keytone Generator; R_BANK Address Name; TBTEN TBTCK2 TBTCK1 TBTCK0; TBKTC; TBIF; TBIE; D Q
  • Page 32 – Registers for UART Circuit; R_BANK Address Name Bit 7
  • Page 33 – Dn; Mode; UMODE PRE; In transmitting serial data, the UART operates as follows:
  • Page 34 – In receiving, the UART operates as follows:
  • Page 35 – Registers for the SPI Circuit
  • Page 36 – Clock; shif t fi nish
  • Page 37 – SI pin; read data
  • Page 39 – Registers for Timer/Counter 2 Circuit; Name; INTCR
  • Page 40 – either rising or falling; can be selected by setting TC2ES. When the contents of; In Window mode, counting up is performed on the; rising or falling edge; of the pulse
  • Page 41 – Registers for Timer/Counter 3 Circuit; R_BANK Address Name
  • Page 42 – either rising or falling edge; can be selected by INT3ES0 but both edge cannot
  • Page 43 – Registers for Timer 4 Circuit
  • Page 44 – In Counter mode, counting up is performed on the; rising edge; of the external clock
  • Page 46 – A reset is initiated by one of the following events:
  • Page 48 – Table 6. Summary of the Initialized Values for Registers; Address Name
  • Page 49 – Register Bank 0
  • Page 50 – Register Bank 1; Addres
  • Page 51 – Register Bank 2; Register Bank 3
  • Page 52 – General Purpose Registers; Table 7. The Values of RST, T and P after a reset; Reset Type; Table 8 The Events that may affect the T and P Status; Event
  • Page 53 – Fig. 5-28 Controller Reset Block Diagram; Table 9 Interrupt Vector; Interrupt Source
  • Page 54 – Table 10 Oscillator Modes Defined by SDCS and OSC; High; Table 11 The Summary of Maximum Operating Speeds; Condition; High frequency oscillator
  • Page 55 – OSCI; Oscillator Type; Ceramic Resonator; XTAL; OSCI
  • Page 56 – frequency is easily affected by noise, humidity, and leakage.; Fig. 5-33 External RC Oscillator Mode Circuit
  • Page 57 – Code Option Register
  • Page 58 – Protect; Others Enable; Word 1; Word 2; XXXXXXXXXXXXX
  • Page 59 – When battery is replaced, device power (V; The residue-voltage may trip below V; minimum, but not to zero. This condition may; Vdd; Vdd; Fig. 5-35 Residue Voltage Protection Circuit 1; Vdd; Vdd; Fig. 5-36 Residue Voltage Protection Circuit 2
  • Page 60 – Instruction Set; execution takes two instruction cycles.
  • Page 62 – Absolute; Absolute Maximum Ratings; Items; Recommended Operating Conditions
  • Page 63 – DC Electrical Characteristics
  • Page 66 – AC Electrical Characteristic
  • Page 67 – A C T e s t In p u t/O u tp u t W a ve fo rm
  • Page 68 – OTP MCU; Green product does not contain hazardous substances.
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EM78P312N

8-B

IT

Microcontroller

Green Product

Specification

D

OC

.

V

ERSION

1.0

ELAN

MICROELECTRONICS

CORP.

October 2006

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Summary

Page 2 - Copyright; 006 by ELAN Microelectronics Corporation; http

Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation. ELAN and ELAN logo are trademarks of ELAN Microelectronics Corporation. Copyright © 2006 by ELAN Microelectronics Corporation All Rights Reserved Printed in Taiwa...

Page 3 - Contents; General; Purpose; Rate

Contents Product Specification (V1.0) 10.03.2006 • iii Contents 1 General Description.....................................................................................................1 2 Features ........................................................................................................

Page 4 - iv; Maximum; Electrical; APPENDIX; A Package; Specification Revision History; Revision Description; Version

Contents iv • Product Specification (V1.0) 10.03.2006 5.14 Reset and Wake-up ............................................................................................ 42 5.14.1 Reset ................................................................................................................ 4...

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