IBM CLC-CAPT-PCASM - Manual
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Table of Contents:
- Page 2 – Operation of Data Capture Board
- Page 3 – Histogram Mode; Hardware Configuration; Jumpers; WCLK should; DIP Switches; ON; FPGA
- Page 4 – Power Up the System; Light Emitting Diode (LED) Status Monitors; Software Configuration
- Page 6 – Select; “Histogram Debug”; When the data capture control panel returns, you
- Page 7 – Hardware; General Description and Program Options
- Page 11 – ton to perform an FFT on the captured data.; Section IV. Data Analysis Tools
- Page 12 – variable
- Page 15 – Data Capture Boar
© 1999 National Semiconductor Corporation
http://www.national.com
Printed in the U.S.A.
N
Section I. Introduction
The CLC3790093 Data Capture Board enables simple evaluation
of National Semiconductor’s High Speed Analog to Digital Con-
verters (ADCs) and the Diversity Receiver Chip Set (DRCS). The
Data Capture Board interfaces the outputs of these devices to the
standard serial port available on the back of most Personal
Computers (PCs). We have provided PC software to control the
data capture function and Matlab
®
scripts for data analysis.
A block diagram of the evaluation test bed is shown below.
The Data Capture Board contains a field-programmable gate
array (FPGA) that controls its operation. An EPROM configures
the FPGA after power is applied. The serial interface is provided
by a UART (Universal Asynchronous Receiver/Transmitter), an
oscillator, and a level translator IC. The captured data is stored in
either three 32K x 8 static RAMs (organized into 24-bit words) or
in a FIFO containing 32K 18-bit words. LEDs provide a visual
indication of activity. DIP switches and a jumper configure several
capture functions.
Section II. Capturing Data from ADC
Evaluation Boards
Getting Started
To use the Data Capture board to capture data from a National
Semiconductor Analog to Digital converter, you will need the
following hardware, software, and documentation.
CLC-CAPT-PCASM
Data Capture Board User’s Guide
Table of Contents
I. Introduction
II. Capturing Data from ADC
Evaluation
Boards
III. Capturing Data from the DRCS
Evaluation Boards
IV. Data Analysis using Matlab
Script
Files
May 1999
Rev 1.0.0
CLC-CAPT
-PCASM
Data Capture Boar
d User’
s Guide
CLC5956
Evaluation Board
CLC5958
Evaluation Board
Digital Receiver
ChipSet (DRCS)
Evaluation Board
Data
Capture
Board
National Semiconductor
High-Speed Converter
Evaluation Test Bed
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Summary
http://www.national.com 2 Hardware 1. CLC3790093 Data Capture Board (CLC-CAPT-PCASM) 2. CLC Evaluation Board. Several ADC products can be evaluated with this system. Currently, the choicesare the CLC5956 (12-bit 65MSPS ADC), or theCLC5958 (14-bit 52MSPS ADC). Each producthas a unique evaluation boar...
3 http://www.national.com complement number can be converted to offset binary byinverting the MSB. This is the first step in the Matlabroutine for FFT analysis. Histogram Mode In the second mode of operation, the “Histogram” mode,the data capture board operates as a hardware histo-grammer. The board...
http://www.national.com 4 SMA Connectors The output clock SMA connector provides a signal thatcan be used to phase lock a signal source. Thefrequency is that of the input clock signal divided by 2.For example, with an attached CLC5958 ADC evaluationboard at 52MSPS the clock output signal will be a 2...
