Page 3 - Safety Summary; Warning
Safety Summary The following general safety precautions must be observed during all phases of operation, service, and repair ofthis equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manualcould result in personal injury or damage to the equipment. The sa...
Page 4 - Caution; Attention; Vorsicht
Flammability All Motorola PWBs (printed wiring boards) are manufactured with a flammability rating of 94V-0 by UL-recognized manufacturers. EMI Caution ! Caution Cau tion This equipment generates, uses and can radiate electromagnetic energy. It may cause or be susceptible to electromagnetic interfer...
Page 7 - Contents
vii About This Guide Overview of Contents ................................................................................................ xivComments and Suggestions ...................................................................................... xivConventions Used in This Manual ..............
Page 9 - List of Figures
ix Figure 1-1. MVME6100 Board Layout Diagram ................................................... 1-4Figure 2-1. PCI Bus 1 Local Bus PMC Expansion Slots ...................................... 2-15 List of Figures
Page 10 - List of Tables
xi Table 1-1. MVME6100 Features Summary ............................................................ 1-2Table 1-2. Default Processor Address Map ............................................................. 1-5Table 1-3. MOTLoad’s Processor Address Map ..................................................
Page 12 - Overview of Contents; Chapter 1, Board Description and Memory Maps; Comments and Suggestions; You can also submit comments to the following e-mail address:
xiv Overview of Contents This manual is divided into the following chapters and appendices: Chapter 1, Board Description and Memory Maps , provides a brief product description and a block diagram. The remainder of the chapter provides information on memory maps and system and configuration registers...
Page 13 - Conventions Used in This Manual; bold; italic; Ctrl
xv Conventions Used in This Manual The following typographical conventions are used in this document: bold is used for user input that you type just as it appears; it is also used for commands, options and arguments to commands, and names of programs, directories and files. italic is used for names ...
Page 14 - Introduction; Note; Appendix A, Related Documentation; Overview
1-1 1 1 Board Description and Memory Maps Introduction This chapter briefly describes the board level hardware features of the MVME6100 single-board computer, including a table of features and a block diagram. The remainder of the chapter provides memory map information including a default memory ma...
Page 15 - The following table lists the features of the MVME6100.
1-2 Computer Group Literature Center Web Site Board Description and Memory Maps 1 The following table lists the features of the MVME6100. Table 1-1. MVME6100 Features Summary Feature Description Processor – Single 1.3 GHz MPC7457 processor– Bus clock frequency at 133 MHz– 36-bit address, 64-bit data...
Page 17 - Figure 1-1. MVME6100 Board Layout Diagram
1-4 Computer Group Literature Center Web Site Board Description and Memory Maps 1 Figure 1-1. MVME6100 Board Layout Diagram 4248 0504 10/100/1000 D E B U G ABT/RST LAN 2 LAN 1 J42 J8 J30 U20 J3 J19 J13 J14 J11 J12 J23 J24 J21 J22 P1 P2 U21 PCI MEZZANINE CARD PCI MEZZANINE CARD J4 U12 10/100/1000 J93...
Page 18 - Memory Maps; Default Processor Memory Map
Memory Maps http://www.motorola.com/computer/literature 1-5 1 Memory Maps Default Processor Memory Map The MV64360 presents a default CPU memory map following RESET negation. The following table shows the default memory map from the point of view of the processor. Address bits [35:32] are only relev...
Page 19 - Set by configuration resistors.
1-6 Computer Group Literature Center Web Site Board Description and Memory Maps 1 Note Set by configuration resistors. 2800 0000 29FF FFFF 32M PCI Bus 1 Memory Space 3 2A00 0000 41FF FFFF 384M Unassigned 4200 0000 4303 FFFF 256K MV64360 Integrated SRAM 4304 0000 F0FF FFFF 2783M Unassigned F100 0000 ...
Page 20 - MOTLoad’s Processor Memory Map; MOTLoad’s processor memory map is given in the following table.; Table 1-3. MOTLoad’s Processor Address Map
MOTLoad’s Processor Memory Map http://www.motorola.com/computer/literature 1-7 1 MOTLoad’s Processor Memory Map MOTLoad’s processor memory map is given in the following table. Note The internal registers only occupy the first 64KB, but minimum address decoding resolution is 1MB. Table 1-3. MOTLoad’s...
Page 21 - Default PCI Memory Map
1-8 Computer Group Literature Center Web Site Board Description and Memory Maps 1 Default PCI Memory Map The MV64360 presents the following default PCI memory map after RESET negation. Note: it is the same as the GT-64260A with the addition of integrated SRAM. Table 1-4. Default PCI Address Map PCI ...
Page 24 - System Status Register 1
System Status Register 1 http://www.motorola.com/computer/literature 1-11 1 System Status Register 1 The MVME6100 board System Status Register 1 is a read-only register used to provide board status information. REF_CLK Reference clock. This bit reflects the current state of the 28.8 KHz reference cl...
Page 26 - System Status Register 2
System Status Register 2 http://www.motorola.com/computer/literature 1-13 1 System Status Register 2 The MVME6100 board system status register 2 provides board control and status bits. BD_FAIL Board Fail. This bit is used to control the Board Fail LED located on the front panel. A set condition illu...
Page 28 - System Status Register 3
System Status Register 3 http://www.motorola.com/computer/literature 1-15 1 System Status Register 3 The MVME6100 board system status register 3 provides the board software-controlled reset functions. BOARD_RESET Board Reset. Setting this bit will force a hard reset of the MVME6100 board. This bit w...
Page 29 - Presence Detect Register; EREADY1
1-16 Computer Group Literature Center Web Site Board Description and Memory Maps 1 Presence Detect Register The MVME5500 board contains a presence detect register that may be read by the system software to determine the presence of optional devices. IPMC_PRSNT IPMC Module Present. If set (HIGH true)...
Page 31 - ON
1-18 Computer Group Literature Center Web Site Board Description and Memory Maps 1 indicates that the switch is ON for the header position associated with that bit, and a set condition indicates that the switch is OFF. CFG_0 = 0 CFG_1 = 0 CFG_2 = 0 CFG_3 = 0 CFG_4 = 0 CFG_5 = 0 CFG_6 = 0 CFG_7 = 0 C...
Page 32 - Time Base Enable Register
Time Base Enable Register http://www.motorola.com/computer/literature 1-19 1 Time Base Enable Register The time base enable (TBEN) register provides the means to control the processor’s TBEN input. TBEN0 Processor 0 time base enable. When this bit is cleared, the TBEN pin of processor 0 is driven lo...
Page 33 - Real-Time Clock and NVRAM
1-20 Computer Group Literature Center Web Site Board Description and Memory Maps 1 interrupts may be tailored to meet user requirements. The ST16C554DCQ64 provides constant active interrupt outputs but do not offer TXRDY/RXRDY outputs. Refer to the EXAR ST16C554D data sheet for additional informatio...
Page 34 - Programming Details
2-1 2 2 Programming Details Introduction This chapter includes additional programming information for the MVME6100 single-board computer. Items discussed include: ❏ MV64360 Multi-Purpose Port Configuration on page 2-1 ❏ MV64360 Reset Configuration on page 2-3 ❏ Flash Memory on page 2-8 ❏ Real-Time C...
Page 35 - Table 2-1. MV64360 MPP Pin Function Assignments
2-2 Computer Group Literature Center Web Site Programming Details 2 following table defines the function assigned to each MPP pin on the MVME6100 board. Table 2-1. MV64360 MPP Pin Function Assignments MPP Pin Number Input/Output Function 0 I COM1 /COM2 interrupts (ORed) 1 I Unused 2 I Abort interrup...
Page 36 - Pins sampled on the deassertion of reset
MV64360 Reset Configuration http://www.motorola.com/computer/literature 2-3 2 MV64360 Reset Configuration The MV64360 supports two methods of device initialization following reset: ❏ Pins sampled on the deassertion of reset ❏ Partial pin sample on deassertion of reset plus Serial ROM initialization ...
Page 42 - Two-Wire Serial Interface; A two-wire serial interface for the MVME6100 is provided by an I
Two-Wire Serial Interface http://www.motorola.com/computer/literature 2-9 2 Two-Wire Serial Interface A two-wire serial interface for the MVME6100 is provided by an I 2 C compatible serial controller integrated into the MV64360 system controller. The I 2 C serial controller provides two basic functi...
Page 43 - Notes; DDR DRAM Serial Presence Detect
2-10 Computer Group Literature Center Web Site Programming Details 2 The following table shows the I 2 C devices on the MVME6100 and their assigned device IDs. Notes 1. The SPD defines the physical attributes of each bank or group of banks, i.e. if both banks of a group are populated, they will be t...
Page 45 - Determined by boot bank select jumper.; MPC Bus and PCI Bus Arbitration; PCI Bus 0 and PCI Bus 1 Local Buses; PCI Mode/Frequency Selection
2-12 Computer Group Literature Center Web Site Programming Details 2 Note 1. Determined by boot bank select jumper. MPC Bus and PCI Bus Arbitration The MV64360 ASIC supplies these functions. Refer to the MV64360 Data Sheet, listed in Appendix A, Related Documentation , for details. PCI Bus 0 and PCI...
Page 46 - PCI Configuration Space
PCI Configuration Space http://www.motorola.com/computer/literature 2-13 2 Specification Revision 1.0b) at the rising edge of RST#. Onboard logic will sense the states of PCIXCAP and M66EN for all devices on the bus and select the appropriate mode and clock frequency. Software can access the MV64360...
Page 47 - PCI Arbitration Assignments for MV64360 ASIC; The arbitration assignments on MVME6100 are as follows:; PCI Bus 1 Local Bus PMC Expansion Slots; Table 2-7. PCI Arbitration Assignments for MV64360
2-14 Computer Group Literature Center Web Site Programming Details 2 PCI Arbitration Assignments for MV64360 ASIC PCI arbitration is performed by the MV64360 ASIC. The MV64360 integrates two PCI arbiters, one for each PCI interface (PCI Bus 0/1). Each arbiter can handle up to six external agents plu...
Page 48 - Figure 2-1. PCI Bus 1 Local Bus PMC Expansion Slots; PCI Bus 0 Local Bus Devices; PMC Slot 0
PCI Bus 0 Local Bus Devices http://www.motorola.com/computer/literature 2-15 2 Figure 2-1. PCI Bus 1 Local Bus PMC Expansion Slots PCI Bus 0 Local Bus Devices The MV64360 PCI Bus 0 local bus contains the Tsi148 ASIC and PCI6520 PMCSpan bridge. Tsi148 ASIC The VMEbus interface is provided by the Tsi1...
Page 50 - The interrupting device is addressed from the MV64360 PCI
MV64360 Interrupt Controller http://www.motorola.com/computer/literature 2-17 2 Notes 1. The interrupting device is addressed from the MV64360 PCI Bus 0. 2. The interrupting device is addressed from the MV64360 PCI Bus 1. 3. The interrupting device is addressed from the MV64360 Device Bus. GPP[18] L...
Page 51 - The interrupting device is addressed from the MV64360 I2C
2-18 Computer Group Literature Center Web Site Programming Details 2 4. The interrupting device is addressed from the MV64360 I2C Bus. 5. The mapping of VMEbus interrupt sources and Tsi148 internal interrupt sources are programmable via the Interrupt Map Registers 1 and 2 in the Tsi148 ASIC. 6. The ...
Page 52 - Related Documentation; Motorola Computer Group Documents; Contacting your local Motorola sales office; Table A-1. Motorola Computer Group Documents
A-1 A A Related Documentation Motorola Computer Group Documents The Motorola publications listed below are referenced in this manual. You can obtain electronic copies of Motorola Computer Group publications by: ❏ Contacting your local Motorola sales office ❏ Visiting Motorola Computer Group’s World ...
Page 53 - Manufacturers’ Documents
A-2 Computer Group Literature Center Web Site Related Documentation A Manufacturers’ Documents For additional information, refer to the following table for manufacturers’ data sheets or user’s manuals. As an additional help, a source for the listed document is provided. Please note that, while these...
Page 56 - Related Specifications
Related Specifications http://www.motorola.com/computer/literature A-5 A Related Specifications For additional information, refer to the following table for related specifications. For your convenience, a source for the listed document is also provided. It is important to note that in many cases, th...
Page 57 - Index
IN-1 B block diagram 1-4 C comments, sending xiv config switch register 1-17 conventions used in the manual xv D default PCI memory map 1-8 default processor memory map 1-5 documentation, related A-1 M manual conventions xv manufacturers’ documents A-2 memory maps default PCI 1-8 default processor 1...
