Page 2 - SDHC Memory Card + Reader S5; Transcend Information Inc.; Architecture
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 2 Architecture
Page 3 - Bus Operating Conditions
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 3 Bus Operating Conditions • General Parameter Symbol Min. Max. Unit Remark Peak voltage on all lines -0.3 V DD +0.3 V All Inputs Input Leakag...
Page 5 - Bus Signal Levels; Parameter
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 5 • Bus Signal Levels As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage. To meet ...
Page 6 - Bus Timing
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 6 • Bus Timing Parameter Symbol Min Max. Unit Remark Clock CLK (All values are referred to min (V IH ) and max (V IL ) Clock frequency Data Tr...
Page 7 - Output Delay time during Data Transfer Mode; Output Delay time during Identification Mode
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 7 Output Delay time during Data Transfer Mode t ODLY 0 14 ns C L ≤ 40 pF, (1 card) Output Delay time during Identification Mode t ODLY 0 50 ns...
Page 10 - Reliability and Durability; Temperature
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 10 Reliability and Durability Temperature Operation: -25°C / 85°C Storage: -40°C (168h) / 85°C (500h) Junction temperature: max. 95°C Moisture...
Page 11 - Register Information; The OCR register shall be implemented by the cards.; OCR Register Definition
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 11 Register Information Within the card interface six registers are defined: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only by co...
Page 15 - CSD Register Structure; TAAC
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 15 CSD Register Structure • TAAC This field is fixed to 0Eh, which indicates 1 ms. The host should not use TAAC, NSAC, and R2W_FACTOR to calcu...
Page 20 - SCR Register Structure Version
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 20 0x404. 6. SCR Register In addition to the CSD register there is another configuration register that named - SD CARD Configuration Register ...
Page 21 - SD Supported Security Algorithm
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 21 Defines the data status after erase, whether it is ‘0’ or ‘1’ (the status is card vendor dependent). • SD_SECURITY Describes the security a...
Page 22 - Mechanical Dimension
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information Inc. 22 Mechanical Dimension
Page 26 - Pin Identification; Block Diagram
T T T S S S 4 4 4 G G G - - - 1 1 1 6 6 6 G G G S S S D D D H H H C C C 6 6 6 - - - S S S 5 5 5 W W W SDHC Memory Card + Reader S5 Transcend Information, Inc. 26 Pinouts Pin No. Pin Name 01 V USB 02 USB- 03 USB+ 04 VSS Pin Identification Symbol Function USB- USB+ USB differential signal: The pairs a...