Sharp ER-A750 - Manuals
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Manual Sharp ER-A750
Summary
The RBRC TM Seal The RBRC TM Seal on the easily removable nickel-cadmium battery pack contained in our product indicates that SHARP is voluntarily participating in an industry program tocollect and recycle these battery packs at the end of their useful life, when taken out ofservice within the Unite...
CHAPTER 1. SPECIFICATION 1. Apearance External view Front view Rear view 2. Rating External dimensions 11.4 × 14.4 × 10.3 in. (290 × 365 × 262 mm) Weight 11.2 lbs. (5.1 kg) Power source 120V AC ± 10% 60 Hz Power consumption Stand-by: 22WOperating: 25W (max.) Working temperatures 32 to 104˚F (0 to 40...
Device type LCD display Dot format 320(W) × 240(H) Full dot Dot size 0.33 × 0.33 mm Dot space 0.03 mm Dot color White Back color Dark blue Weight 180 g 2) Customer display ST: Lights up when a subtotal is displayed. CG: Lights up when the change due amount appears in the dis-play or when the total s...
CHA P T E R 2. OP T IONS 1. S y s te m con fi g u rat io n 2 – 1
5. How to use service tools 5-1. Expansion PWB : CKOG-6724BHZZ • Extrenal view • Plain view • Connection diagram 5-2. MCR test card: UKOG-6718RCZZ • Used when executing the diagnostics of the ER-A8MR. • External view Test pins : Used to c heck the bus signals. Bus connector : Used to check the bus s...
CHAPTER 3. SERVICE PRECAUTION 1. Adjustment for SRN ( IN-LINE) interface circuit If transistor Q10 in the transmitter/receiver section has been re-placed or if the SRN level requires readjustment, the following align-ment is required: 1) Tools and Instruments Required 1 Oscilloscope (50MHz or better...
b) Receive level adjustment i) Turn on both the receiver terminal and the transmitter terminal. ii) Run the diagnostic program "Flag send check" on the transmitter terminal to send a flag. iii) Checking transmitter terminals’ output waveform Using an oscilloscope, check the transmitter termi...
PWB marking Packing case 2) Cautions to be exercised when using the RAM PWBs with the ER-A750 When using the above-mentioned RAM PWB version (1) with theER-A750, it is necessary to correct the RAM access tim ing. Use ofthe above-mentioned RAM PWB version (2) does not require thecorrection of the RAM...
3) Difference in operation according to the setting of the jumper Only when the ER-03MB or the ER-04MB is used in the above settingstate (1) will one cycle (i.e., cycle for generating pre-charge time ofthe quasi-SRAM: TP cycle) of access be additionally inserted into theCPU, thereby delaying the CPU...
(6) Turn off the power of the ER-A750. (7) Remove the ER-A7RS from the ER-A750. (8) Perform the master reset. (Refer to CHAPTER 4.) 4) IPL from PC via IR (infrared) communication (1) IR communication between the ER-A750 and PC is as follows: (2) Procedures on the PC side and on the ER-A750 side are ...
CHAPTER 4. SRV RESET (Program Loop Reset) andswitch to SRV mode In the ER-A750, the following reset switch (location No.: S2) is usedto switch to the service (SRV) mode and to reset. SRV. reset Used to return the machine back to its operation state after a lock uphas occurred. PROCEDURE 1) Turn off ...
CHAPTER 5. MASTER RESET (All Memory Clear) There are two possible methods to perform a master reset. M RS-1 ( M aster resetting 1) Used to clear all memory contents and return machine back to itsinitial settings. Return keyboard back to default for default kyeboard layout. PROCEDURE 1) Turn off the ...
CHAPTER 6. DIAGNOSTICSSPECIFICATIONS CONTENTS 1. General ..........................................................................................1 2. System configuration .....................................................................1 2-1. Test system ..........................................
ER-A750 Diagnostics V 1.0A Product§&§Test§Diagnostics RAM Diagnostics ROM & SSP Diagnostics Clock & Keyboard & Clerk Diagnostics Serial I/O Diagnostics LCD Diagnostics Rear Display Diagnostics SRN Diagnostics IrDA Diagnostics MCR Diagnostics Drawer Diagnostics Diagnostics End "Pr...
3-3. ROM & SSP Diagnostics The standard ROM and the service ROM are checked. The SSPcircuit is also checked. The following menu is displayed. The cursor position is highlighted.Use ↑ key and ↓ key to move the cursor. Move the cursor to the process you desire and press the enter key. The selected...
4) Data Transmission Check (Send mode) 1 Check content Continuous IR communication between the ER-A750 and the ER-A750. This mode is on the transmission side. When data of 256byte(00H ∼ 0FFH) are transmitted, data packet counter is incremented by one. Check that the counter increments. 2 Display Dat...
CHAPTER 7. CIRCUIT DESCRIPTION 1. Hardware block diagram Drawer x 2 RS232 x 2 CPU H8/510 MPCA 7 IR PSEUDO SRAM 512KB OPC1 EXT.SLOT (80pin x 2) RAMCN (50pin) CKDC7 SW KEY +24V -24V +5V VCC LCD 320 x 2 40 dots DRIVER +24V DRIVER +24V DRIVER/RECEIVER LCD CONTROLLER BRIGHTNESSCONTROL KNOB INVERTOR LIQUI...
7-2 2. Description of main LSI’s 2-1. CPU (HD6415108FX)
2-3. OPC1 (F256004PJ) 1) General description The OPC1 is a gate array of integrated peripheral circuits of RS-232/Simple IRC interface. One chip of the OPC1 is equipped with four communication circuits.(Three of them are for RS-232 only: UNIT 0 ~ 2, one is for selectionof simple IRC/RS-232: UNIT 3)T...
2-4. USART (MB89371A) 1) General The MB89371A (Serial data transmitter/receiver, 2 units) is a versa-tile-use interface LSI for communication lines, which is equippedwith two sets of equivalent units of the MB89251A (serial data trans-mitter/receiver), the baud rate generating section, and the inter...
2-5. Z80 CPU 1) Features The extensive instruction set contains 158 instructions, including the8080A instruction set as a subset. • NMOS version for low cost high performance solutions, CMOSversion for high performance low power designs. • Z0840006 - 6.17 MHz • CMOS Z84C0006 - DC to 6.17 MHz, Z84C00...
4) Pin description Pin No. Symbol Signal name In/Out Function 1 CLK CLK In Clock 2 D4 S D4 In/Out Data bus 3 D3 S D3 In/Out Data bus 4 D5 S D5 In/Out Data bus 5 D6 S D6 In/Out Data bus 6 +5V VCC — +5V 7 D2 S D2 In/Out Data bus 8 D7 S D7 In/Out Data bus 9 D0 S D0 In/Out Data bus 10 D1 S D1 In/Out Dat...
3) Pin configuration Figure 2c. 44-pin Quad Flat Pack Pin Assignments 4) Functional description The Z80 CTC has four independent counter/timer channels. Eachchannel is individually programmed with two words: a control wordand a time-constant word. The control word selects the operatingmode (counter ...
2-7. µ PD71037 DMA CONTROLLER The µ PD71037 is a direct memory access controller (DMAC) for the m icro processor system . It provides higher processing speed andlower power consumption in comparison with those in conventionaluse. Each of the four built-in DMA channels has 64-KB addressesand the func...
2-8. MB62H149 1) Outline The MB62H149 is a semi-custom LSI chip for the peripheral circuitsin the SRN (SHARP Retail Network), its main function is tocommunicate data with the host CPU and control the peripheralcircuits and transmission control circuits of the Sub CPU (Z-80). Fig.2. shows the general...
10-1. Block diagram The block diagram of the weight control function is shown in Figure10. Fig. 10 In the figure, the decoder, wait enabling register, AND-OR sectionsare the same as those in the MPCA5 or 6, but other components arenewly incorporated in the MPCA7. EXWAITZ and LCDWT are external weigh...
14. I/O expansion bus specifications The table below shows the standard bus for expanding optionaldevices Table 18 Signal name Pin No. Pin No. Signal name GND 1 41 GND GND 2 42 GND RDO 3 43 RD WRO 4 44 EXWAIT +5V 5 45 BREQ +5V 6 46 BACK A23 7 47 TRQ2 A22 8 48 TRQ1 A21 9 49 EXINT1 A20 10 50 EXINT0 A1...
17. Rewriting flash memory Below are the memory maps at the time of normal operation, ship-ping from the factory and IPL. 1. During normal operation (Fig. 17) 2. When leaving the factory (Fig. 18) When a service PWB or AMRS PWB is inserted into an expansion I/Oport, the PROM addresses on the service...
18. IR communication The ER-A750 has IR communication function which is softwarewiselycompatible with the ER-A460. Data is exchanged with the MPCA7using the channel 1 (SCI1) of the serial communication interface ofthe CPU. 18-1 CPU interface and modulator/demodulator Here is its block diagram. Fig. ...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A VC C R2 4 6 10K VC C MPC A 7 MP C A 6 - > MP C A 7 1 996/1 0/31 I C 1 8 REN A M E D 1 9 9 6/10 /3 1 PO R T STY L E C H AN G E D /T R Q 1 ,/T R Q 2 ,/E X IN T 0 ,/E X IN T 1 /R E S /P O F F 1996/ 11/ 1 S Y M B O L C H A N G E D R P M-850 C B 1 9 9 6 ...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A OP C1 D [0 ..7 ] A [0 ..5 ] VC C /R E S /SRESE T 1 2 IC 9 A 74 F 0 4 12 13 11 IC 5 D 74 F08 SRNR E SET /S R NR ES ET VC C C256 0. 1 u F C1 3 10 uF /1 6 V VC C VCC CS3 1 CS2 2 T R NE M P 3 3 BRK 3 4 T R N RDY 3 5 RCVRDY 3 6 RXDA T A 0 7 TR C K 8 RE S 9 ...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A DRA W E R +2 4 V 1 996/1 0/31 SYMBOL C H A N GE D 1 996/1 1/5 P A RTS ADD E D C ? 0.1u F R1 2 5 (2 .7 K - > 1 0 K) 199 6 /11/ 6 P A R T S C H A N G E D R 1 2 4 (1 K - > 2. 2K ) VRES /D R 0 /D R 1 C141 0. 1 u F IC15 TD 6 2 308 F /D R A W0 /D R A W...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A 1 2 3 4 5 6 7 8 9 10 11 12 CO N 6 /S9 1 2 3 4 5 6 7 8 9 10 11 12 13 CO N 1 /KS0 /KS1 D1 D2 D3 /S0 /S1 CKDC PWB2/ 3 /S0 /S1 ST 0 ST 1 A 1 B 2 C 3 G1 6 G2 A 4 G2 B 5 Y0 15 Y1 14 Y2 13 Y3 12 Y4 11 Y5 10 Y6 9 Y7 7 IC 1 74 LS 1 3 8 ST 0 ST 1 ST 2 ST 3 VC C ...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A + 2 4 V,VCC + 5 V ,/ P O F F CI RCUI T 19 9 6 /1 0/ 31 S Y M B O L C H A N G E D [ +5V POWER CIRCUIT ] C155 0. 1 u F VCC VRES C R240 1K C2 4 7uF/1 6V OS R241 5. 6K 1 3 Q6 2S A 127 0 C1 9 100uF /1 6 V O S R2 62 3.6K F C1 8 10 00uF/ 16V ZD 4 R D 5. 6FB 3...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A CL S 2 3 1 IC 1 A 74 H C 0 2 *N O T USED PI N M U ST B E C O NNECT ED T O T H E G N D. (7 4 H C0 2 ) 7R S_M CR I /F D [0 ..7 ] CL OCK 33 RS T 34 DSR 1 35 RT S1 36 D TR1 37 TR NC L K 1 5 VC C 40 GN D 47 RCVCL K 1 39 W 6 CS1 7 RC V R DY1 10 SYN C /BR K 1...
8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A 7R S _ CON VCC 01 1 02 2 03 3 04 4 05 5 06 6 07 7 08 8 09 9 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35 36 36 37 37 38 38 39 39 40 40 CON2A ...
PARTS GUIDE MODEL ER-A750 (For “U” & “A” version) 1 Top cabinet etc. 2 Bottom cabinet etc. 3 Packing material&Accessories 4 Main PWB unit 5 Mother PWB unit 6 CKDC PWB unit 7 N/F PWB unit 8 Inverter PWB unit 9 Rear display PWB unit 10 Service tools ■ Index CONTENTS
2 Bottom cabinet etc. NO. PARTS CODE PRICE RANK NEW MARK PART RANK DESCRIPTION 1 L A N G K 7 5 6 4 B H Z Z AV C Option angle 1 2 X H B S D 3 0 P 0 4 0 0 0 AA C Screw (3 ✕ 4) 3 L X - B Z 1 0 8 5 C C Z Z AA C Screw (3 ✕ 8) 4 L X - B Z 6 7 8 2 B H Z Z AA C Screw (3 ✕ 8KS) 5 L A N G K 7 5 7 1 B H Z Z AL...
3 Packing material&Accessories NO. PARTS CODE PRICE RANK NEW MARK PART RANK DESCRIPTION 1 S P A K A 8 3 7 7 B H Z L AS N D Packing add L 2 S S A K H 0 0 0 3 D H Z Z AE D Vinyl bag (640 ✕ 560mm) 3 S P A K A 8 3 7 7 B H Z R AS N D Packing add R 4 S P A K C 8 3 7 8 B H Z Z AY N D Packing case [U.S....
4 Main PWB unit NO. PARTS CODE PRICE RANK NEW MARK PART RANK DESCRIPTION 1 R C R M Z 1 0 1 6 L C Z Z AF C Crystal (16MHz) [X4] 2 V C E A P S 1 C C 1 0 6 M AC C Capacitor (16WV 10 µ F) [C11,12,14,16,17,21,23,26] 3 V C E A P S 1 C C 4 7 6 M AC C Capacitor (16WV 47 µ F) [C1,27] 4 V H E R D 3 0 P B / / ...
4 Main PWB unit NO. PARTS CODE PRICE RANK NEW MARK PART RANK DESCRIPTION 74 V R S - T S 2 A D 1 6 2 J AA C Resistor (1/10W 1.6K Ω ± 5%) [R296,297] 75 V R S - T S 2 A D 1 8 3 J AA C Resister (1/10W 18K Ω ± 5%) [R301] 76 V R S - T S 2 A D 2 2 2 J AA C Resister (1/10W 2.2K Ω ± 5%) [R125] 77 V R S - T S...
■ Index PARTS CODE NO. PRICE RANK NEW MARK PART RANK [C]CKOG-6724BHZZ 10- 2 BX N S CPWBF7508BH01 2- 17 BH N E " 7- 901 BH N E CPWBF7513BH01 2- 61 BN N E " 9- 901 BN N E CPWBN7511BH01 1- 22 BT N E " 6- 901 BT N E CPWBN7512BH01 1- 21 BQ N E " 8- 901 BQ N E CPWBX7510BH01 2- 22 CW N E ...
COPYRIGHT 1997 BY SHARP CORPORATION All right reserved. Printed in the USA. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording, or otherwise, without prior written permission of...
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