Quatech MPA-100 - Manuals

4.1 Using Terminal Count to Generate Interrupts The MPA-100 allows the option of generating an interrupt whenever the Terminal Count (TC) signal is asserted. Terminal Count is an indicator generated by the system’s DMAcontroller, which signals that the number of transfers programed into the DMA cont...

5. JUMPER CONFIGURATIONS The MPA-100 utilizes various jumper blocks which allow the user to customize their hardware configuration. The following sections explain the function and setting of each of thejumper blocks on the MPA-100. 5.1 DTE/DCE Configuration - J2, J11, & J12 The jumper packs J2, ...

5.4 Transmit DMA Selection - J8 J8 Selects the DMA channel to be used for Transmit DMA. Three channels (1 - 3) are available on the MPA-100 for DMA. When selecting a DMA channel, both the DMAacknowledge (DACK) and the DMA request (DRQ) for the appropriate channel need to beselected. Table 7 summariz...

NOTE: Since it is illegal to perform DMA on transmit and receive on thesame DMA channel, jumper blocks J7 and J8 should never have thesame pins connected. This could result in damage to the system. 5.6 SYNCA to RLEN Control - J7 J7 controls the signal path from the RLEN bit in the Communications Reg...

6. SCC GENERAL INFORMATION The Serial Communications Controller (SCC) is a dual channel, multi-protocol data communications peripheral. The MPA-100 provides a single channel for communications,however, to provide full DMA capabilities with complete modem control line support, bothchannels of the SCC...

6.1 Accessing the Registers The mode of communication desired is established and monitored through the bit values of the internal read and write registers. The register set of the SCC includes 16 write registers and9 read registers. These registers only occupy four address locations, which start at ...

6.2 Baud Rate Generator Programming The baud rate generator (hereafter referred to as the BRG) of the SCC consists of a 16-bit down counter, two 8-bit time constant registers, and an output divide-by-two. The time constantfor the BRG is programmed into WR12 (least significant byte) and WR13 (most si...

6.3 SCC Data Encoding Methods The SCC provides four different data encoding methods, selected by bits D6 and D5 in WR10. These four include NRZ, NRZI, FM1 and FM0. The SCC also features a digitalphase-locked loop (DPLL) that can be programmed to operate in NRZI or FM modes. Also, theSCC contains two...

7. DIRECT MEMORY ACCESS Direct Memory Access (DMA) is a way of transferring data on the ISA bus directly to and from memory, resulting in high data transfer rates with very low CPU overhead. The ISA busDMA channel(s) to be used are selected through jumper packs J6 and J7. The sources for thesereques...

8. CONFIGURATION REGISTER The MPA-100 is equipped with an onboard register used for configuring information such as DMA enables, DMA sources, interrupt enables, and interrupt sources. Below is a detaileddescription of the Configuration Register. The address of this register is Base+5. Table 13detail...

9. COMMUNICATIONS REGISTER The MPA-100 is equipped with an onboard Communications Register which gives the user options pertaining to the clocks and testing. The user can specify the source and type ofclock to be transmitted or received. Test mode bits pertain only to the DTE versions and can beigno...

10.1 DTE Configuration The MPA-100 is configured as a DTE device by correctly setting jumper packs J2, J11 and J12. See Section 5, Table 3 for this configuration information. The control signals the DTE can generate are Request To Send (RTS) and Data Terminal Ready (DTR). It can receive the signals ...

The testing signals the DTE can generate are the Local Loopback Test (LL) and the Remote Loopback Test (RL). These signals are generated from the onboard CommunicationsRegister. When a Test Mode (TM) condition is received, an interrupt can be generated on theDTE. Table 16 summarizes the signals on t...

11. EXTERNAL CONNECTIONS The MPA-100 is designed to meet the RS-232 standard through a D-25 connector. The MPA-100 uses a D-25 short body male connector (labeled CN1) for both the DTE and DCEconfigurations. Jumper blocks J2, J11, and J12 configure the connector pin out. Table 18 andTable 19 display ...

12. DEFINITION OF INTERFACE SIGNALS CIRCUIT AB - Signal Ground Ÿ CONNECTOR NOTATION: DGND Ÿ DIRECTION: Not applicableThis conductor directly connects the DTE circuit ground to the DCE circuit ground. CIRCUIT CC - DCE Ready (Data Set Ready) Ÿ CONNECTOR NOTATION: DSR Ÿ DIRECTION: From DCEThis signal i...