Atmel ATmega324PA - Manuals

Page 2 - Pin Configurations; Pinout

2 8152AS–AVR–11/08 ATmega324PA 1. Pin Configurations 1.1 Pinout - PDIP/TQFP/VQFN/QFN/MLF Figure 1-1. Pinout Note: The large center pad underneath the VQFN/QFN/MLF package should be soldered to ground on the board to ensure good mechanical stability. (PCINT8/XCK0/T0) PB0 (PCINT9/CLKO/T1) PB1 (PCINT10...

Page 5 - Overview; Block Diagram

5 8152AS–AVR–11/08 ATmega324PA 2. Overview The ATmega324PA is a low-power CMOS 8-bit microcontroller based on the AVR enhancedRISC architecture. By executing powerful instructions in a single clock cycle, the ATmega324PAachieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

Page 7 - Pin Descriptions; VCC; Digital supply voltage.; Port A serves as analog inputs to the Analog-to-digital Converter.

7 8152AS–AVR–11/08 ATmega324PA 2.2 Pin Descriptions 2.2.1 VCC Digital supply voltage. 2.2.2 GND Ground. 2.2.3 Port A (PA7:PA0) Port A serves as analog inputs to the Analog-to-digital Converter. Port A also serves as an 8-bit bi-directional I/O port with internal pull-up resistors (selected foreach b...

Page 8 - RESET; ”System and Reset; AVCC; , even if the ADC is not used. If the ADC is used, it should be connected; AREF; Resources

8 8152AS–AVR–11/08 ATmega324PA 2.2.7 RESET Reset input. A low level on this pin for longer than the minimum pulse length will generate areset, even if the clock is not running. The minimum pulse length is given in ”System and Reset Characteristics” on page 329 . Shorter pulses are not guaranteed to ...

Page 9 - Register Summary

9 8152AS–AVR–11/08 ATmega324PA 5. Register Summary Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page (0xFF) Reserved - - - - - - - (0xFE) Reserved - - - - - - - - (0xFD) Reserved - - - - - - - - (0xFC) Reserved - - - - - - - - (0xFB) Reserved - - - - - - - (0xFA) Reserved - - - - - -...

Page 12 - should never be written.

12 8152AS–AVR–11/08 ATmega324PA Notes: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses should never be written. 2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructi...

Page 13 - Instruction Set Summary; Mnemonics

13 8152AS–AVR–11/08 ATmega324PA 6. Instruction Set Summary Mnemonics Operands Description Operation Flags #Clocks ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers Rd ← Rd + Rr Z,C,N,V,H 1 ADC Rd, Rr Add with Carry two Registers Rd ← Rd + Rr + C Z,C,N,V,H 1 ADIW Rdl,K Add Immediate to W...

Page 16 - Ordering Information; and minimum quantities.; see; Power Supply; Industrial; Package Type

16 8152AS–AVR–11/08 ATmega324PA 7. Ordering Information 7.1 ATmega324PA Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging, complies to the European Directive for Restri...

Page 17 - Packaging Information; TITLE; PIN 1 IDENTIFIER

17 8152AS–AVR–11/08 ATmega324PA 8. Packaging Information 8.1 44A 2325 Orchard Parkway San Jose, CA 95131 TITLE DRAWING NO. R REV. 44A, 44-lead, 10 x 10 mm Body Size, 1.0 mm Body Thickness,0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) B 44A 10/5/2001 PIN 1 IDENTIFIER 0˚~7˚ PIN 1 L ...

Page 18 - PIN; eB

18 8152AS–AVR–11/08 ATmega324PA 8.2 40P6 2325 Orchard Parkway San Jose, CA 95131 TITLE DRAWING NO. R REV. 40P6, 40-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) B 40P6 09/28/01 PIN 1 E1 A1 B REF E B1 C L SEATING PLANE A 0º ~ 15º D e eB COMMON DIMENSIONS (Unit of Measure = mm) SY...

Page 19 - ck; asu

19 8152AS–AVR–11/08 ATmega324PA 8.3 44M1 TITLE DRAWING NO. GPC REV. Packa g e Drawin g Contact: p a ck a gedr a wing s @ a tmel.com 44M1 ZW S H 44M1, 44-pad, 7 x 7 x 1.0 mm Body, Lead Pitch 0.50 mm, 5.20 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package ( VQFN) 9/26/0 8 ...

Page 20 - eT; IDE VIEW; Pin 1 ID; TOP VIEW; as

20 8152AS–AVR–11/08 ATmega324PA 8.4 44MC TITLE DRA WING NO . REV . Packa g e Drawin g Contact: p a ck a gedr a wing s @ a tmel.com 44MC A 9/1 3 /07 D2 E2 L L B15 A1 8 B11 A1 3 B10 A12 B6 A7 A6 B5 B1 B20 A1 A24 eT L b R0.20 0.40 eR A19 B16 eT/2 S IDE VIEW A1 A y C D E Pin 1 ID TOP VIEW BOTTOM VIEW No...

Page 21 - ba; A1 BALL ID

21 8152AS–AVR–11/08 ATmega324PA 8.5 49C2 TITLE DRAWING NO. GPC REV. Packa g e Drawin g Contact: p a ck a gedr a wing s @ a tmel.com 49C2 CBD A 49C2, 49- ba ll (7 x 7 Arr a y), 0.65 mm Pitch, 5.0 x 5.0 x 1.0 mm, Very Thin, Fine-Pitch B a ll Grid Arr a y P a ck a ge (VFBGA) 3 /14/0 8 COMMON DIMEN S IO...

Page 22 - Errata

22 8152AS–AVR–11/08 ATmega324PA 9. Errata 9.1 ATmega324PA Rev. F No known Errata.

Page 23 - Datasheet Revision History; – New graphics in; – New

23 8152AS–AVR–11/08 ATmega324PA 10. Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. Thereferring revision in this section are referring to the document revision. 10.1 Rev. 8152A- 11/08 1. Initial revision (Based on the ATmega164P/...

8152AS–AVR–11/08 Headquar ters Inte rnational Atmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600 Atmel AsiaUnit 1-5 & 16, 19/FBEA Tower, Millennium City 5418 Kwun Tong RoadKwun Tong, KowloonHong KongTel: (852) 2245-6100Fax: (852) 2722-1369 Atmel Eu...