ADC MLN7400 - Manuals

ADC MLN7400 – Manual in PDF format online.

Manuals:

Manual

Manual ADC MLN7400

Summary

Page 4 - Table of Contents; Copyright

EVB7400 Table of Contents CHAPTER 1 INTRODUCTION .................................................................................................................. 6 1.1 S YSTEM R EQUIREMENTS ...............................................................................................................

Page 5 - List of Figures; MEMORY MAP

EVB7400 List of Figures [ F I G U R E 1 ] EVB7400 BLOCK DIAGRAM ....................................................................................................................... 6 [ F I G U R E 2 ] MEMORY MAP ........................................................................................

Page 6 - Chapter 1; Introduction; Requirements; rip

EVB7400 Chapter 1 Introduction EVB7400 is a MLN7400 evaluation board and MCS-uClinux training kit that is suitable for code development and exploration of MN7400 with MCS-uClinux. It includes much of the hardware and software required completing your application development. It supports various func...

Page 7 - MAP

EVB7400 ADDRESS MLN7400 MAP EVB7400 0x000_0000 ~ 0x0FF_FFFF ROM/Flash bank 0 (16Mbytes) FLASH(512KB) 0x100_0000 ~ 0x1FF_FFFF ROM/Flash bank 1 (16Mbytes) SRAM(128KB) 0x200_0000 ~ 0x2FF_FFFF ROM/Flash bank 2 (16Mbytes) FLASH(2MB) 0x300_0000 ~ 0x3FF_FFFF ROM/Flash bank 3 (16Mbytes) PCMCIA Card 0x400_00...

Page 8 - Components

EVB7400 1.2 Board Components The arrangement of major components on the board is shown in Figure 3. The major components include: [ F i g u r e 3 ] B LOCK D IAGRAM (T OP VIEW ) User’s Manual V.0.10 8/36 Copyright © 2004 MCS LOGIC Limited. All rights reserved

Page 9 - There are 12 key buttons. They can be used ADC application.

EVB7400 A Flash ROM There is a socket(U9) which accept 512Kbyte size of 8 bit Flash Memory(AT29C010 ~ 40). This is for diaganostic program(includes all pheriperal device driver and TCP/IP protocol stack) and BIOS(MCS-uClinux Boot loader) program. User Flash memory(Selectable Boot ROM) A mounted 48 T...

Page 10 - Timer0 can be supplied by the external clock(ocsillator)

EVB7400 Four buttons(SW5, SW8, SW11, SW14) are connected to ADIN1(ADC channel 1). Three buttons(SW5, SW8, SW11, SW14) are connected to ADIN2(ADC channel 2). External Interrrupt Key There are two button to use external interrupts. Each button(S1,S2) is connected to External interrupt0 and 2. External...

Page 11 - Chapter 2; Board Configuration; Selection

EVB7400 Chapter 2 Board Configuration The EVB7400 is set with default configuration. You can use the board with the defualt settings direclty. However, you can also change the settings according to your nedds. 2.1 Endian Selection (SW1) Status Description BIG LITTLE BIG Endian BIG LITTLE Little Endi...

Page 12 - Setting; 경우

EVB7400 2.4 GPIO Setting <128-TQFP/ 144 -LQFP Common I/O> <144 -LQFP Extended I/O> PIN Shared Initial Board Setting Setting Value PIN Shared Initial Board Setting Setting Value GP00 CUTXD1 N,I UART1 S, O GP27 EXT_TCLK0 N,I Ext Timer0 Clk S, I GP01 CURXD1 N,I UART1 S, O GP28 EXT_TCLK1 N,I...

Page 13 - Chapter 3; Setup EVB7400 Environments; Connection Method for UTP Cable

EVB7400 Chapter 3 Setup EVB7400 Environments 3.1 Ethernet 10/100 BASE-T Connector Same connector and pin for both 10Base-T and 100 Base-Tx < At the network interface card/hubs > < At the cables > RJ45 female connetor at the network interface cards and hubs RJ45 male connector at the cabl...

Page 14 - UTP C

Page 15 - Chapter 4; Connection Configurations for Debug Console; Configuration the Hyper Terminal

EVB7400 Chapter 4 Connection Configurations for Debug Console 4.1 Configuration the Hyper Terminal To configure the Hyper Terminal, which is a Windows utility program for serial communications, refer to following steps: 1. Run the Hyper Terminal program -. Window 95/98/2000/XP start tool bar -> P...

Page 16 - Re-connect Hyper Terminal to run at new properties; Downloading Binary Image and Flash Write

EVB7400 [ F i g u r e 6 ] C HOOSE S ETTING P AGE 6. Re-connect Hyper Terminal to run at new properties Disconnect : Call -> Disconnect Connect: Call -> Call 7. Power-On Reset or push the reset button on EVB7400 board Now, the diagnostic program menu is showed on the Hyper Terminal 4.2 Download...

Page 17 - Type “8” at Flash Program Menu and type address to download.

Page 19 - Write

EVB7400 4.2.2 Flash Write You can write downloaded binary image at User flash memory(AM29LV160BB, U8). Type “2” to write an executable binary file at User Flash memory. Then, you can execute your image by changing Boot Rom selection switch(SW2) to X16(default is X8). User’s Manual V.0.10 19/36 Copyr...

Page 20 - Chapter 5; Opennice32 Installation; OPEN; Powering up the Board and OPENice32; Otherwise, it may cause the failure of code download via JTAG.

EVB7400 Chapter 5 Opennice32 Installation 5.1 OPENice32 The OPENice32 can also be connected with the EVB7400 as a debugging system for software applications development. OPENice32 is a JTAG-based, nonintrusive, debugging system for ARM-based controllers or processors. JTAG provides the interface bet...

Page 21 - Chapter 6; BOM

EVB7400 Chapter 6 EVB7400 1.0 Schemetic and BOM 6.1 EVB7400 BOM No. PART NO GEOMETRY COUNT DESCRIPTION REFERENCE Vendor 1 MLN7400 144LQFP 1 Microprocessor U1 MCS Logic 2 MLN7400P 128TQFP 1 Microprocessor U2 MCS Logic 3 AT24C256 8 SOIC 1 EEPROM(IIC) U3 Atmel 4 AT25040 8 SOIC 1 EEPROM(SPI) U4 Atmel 5 ...

Page 23 - DIP

EVB7400 65 100K 0603(1608) 3 R R165,R169,R170 66 1M 0603(1608) 1 R R1 67 0.01uF_2kV DIP 1 C56 68 0.01uF 0603(1608) 9 C C47,C57,C58,C59,C60, C61,C62,C83,C87 69 0.1uF 0603(1608) 65 C C1,C2,C3,C4,C5, C6,C7,C8,C9,C10, C11,C12,C15,C17,C18, C19,C20,C21,C22,C23, C24,C25,C26,C27,C28, C29,C32,C33,C34,C35, C3...

Page 24 - Schematic

Page 25 - BLOCK DIAGRAM

DATE REMARK UPDATE SHEET REV. CUSTOMER 1 / 14 MCS LOGIC 4 5 2003.11.18 MLN7400EV MLN7400 Evaluation Board 2 1 2 3 1 3 4 5 6 7 6 A B C D BLOCK DIAGRAM E A B C D E DESIGN CHECK-1 CHECK-2

Page 26 - Endian Setting; SYSTEM CLOCK; OPTIONAL

7 BIG LITTLE B CUSTOMER C MLN7400_144LQFP 3 D MCS LOGIC 4 D 2 DATE 5 Main CPU MLN7400 1 6 DESIGN 2 FGND 6 A C UPDATE 5 CHECK-1 3 E 1 SHEET REV. E Endian Setting A 2003.11.18 SYSTEM CLOCK CHECK-2 B 4 MLN7400EV REMARK 2/14 OPTIONAL GROUND GROUND R205 0_3216 33 R5 C11 0.1uF VCC_33 GROUND 0 VCC_33 GROUN...

Page 30 - SDRAM BANK; FLASH; AMD Flash

A B E DESIGN C D 6 7 6 A UPDATE SHEET REV. CUSTOMER 6/14 MCS LOGIC 4 5 1 2 BANK0 SDRAM BANK BANK1 2003.11.18 MLN7400EN 8 9 MEMORY 3 X8 X16 FLASH 1 2 3 AMD Flash BANK Selection BANK2 REMARK CHECK-1 CHECK-2 BOSIZE : 8 Bit BOSIZE : 16Bit 4 5 DATE B C D E R80 0 13 14 C 40 0. 1u F 14 I_O6I_O7 15 16 I_O8 ...

Page 34 - RESET SYSTEM; GPIO LED

3 5 7 Pin : Ground 2 3 5 4 E POWER&RESET JTAG CONNECTOR 6 POWER LED SHEET A 7 10/14 C E REV. 4 MCS LOGIC D 1 DESIGN B DATE UPDATE CHECK-1 CHECK-2 MLN7400EV CUSTOMER 1 2003.11.18 RESET SYSTEM 6 B C 2 A D TC33 2 1 GROUND AMS1086 U17 1 G N D IN 3 OUT 24 TAB REMARK 14 Pin : VCC_33 14 Pin : VCC_33 7 ...