Page 2 - Block Diagram
2 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 1-1. Block Diagram V VCORE V VPERI V VSAT V EVZ CP Logic VCORE- Regulator Internal Supply Reference VPERI- Regulator EVZ- Regulator VSAT- Regulator K30 GEVZ SVSAT VSAT COMCOI COMCOO VCORE SVCORE VPERI SVPERI COMSATI COMSATO COMEVZO FBEVZ EVZ GNDB OCEVZ...
Page 3 - Block Description; Integrated Boost Converter EVZ; • A band gap as reference for all internal voltages and currents
3 4929B–AUTO–01/07 ATA6264 [Preliminary] 1.1 Block Description 1.1.1 Integrated Boost Converter EVZ With an external n-channel FET, the integrated boost converter EVZ provides 3 different volt-ages adjustable via the serial interface for the energy reserve and firing capacitors. Twovoltages are fixe...
Page 4 - Pin Configuration; Pinning QFP44
4 4929B–AUTO–01/07 ATA6264 [Preliminary] 2. Pin Configuration Figure 2-1. Pinning QFP44 K15 EVZ VSAT GNDD VINT COMSATI SVPERI VPERI GNDA VCORE SVSAT USP K30 K2 IASG1 IASG2 IASG3 ISENS TxD1 IASG5 IASG4 K1 RESQ RxD2 RxD1 TxD2 MISO SSQ SCLK MOSI RESQ2 IREF UZP COMEVZO GNDB GEVZ OCEVZ FBEVZ CP SVCORE CP...
Page 6 - Absolute Maximum Ratings; Parameters
6 4929B–AUTO–01/07 ATA6264 [Preliminary] 3. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in ...
Page 8 - Functional Range; Electrical Characteristics – Functional Range
8 4929B–AUTO–01/07 ATA6264 [Preliminary] 4. Functional Range Within the functional range, the ATA6264 works as specified. All voltages are referenced to theideal ground level of an ECU connected to the GNDA, GNDB and GNDD pins. At the beginning of each specification table, supply voltage and tempera...
Page 9 - Protection Against Substrate Currents; USP
9 4929B–AUTO–01/07 ATA6264 [Preliminary] 4.1 Protection Against Substrate Currents Due to the fact that the ATA6264 is connected to the wiring harness and to components outsideof the ECU, negative voltages at the following pins might occur: • IASG interface: IASG1, IASG2, IASG3, IASG4, IASG5 • USP c...
Page 10 - Supply Currents; Electrical Characteristics – Supply currents
10 4929B–AUTO–01/07 ATA6264 [Preliminary] 5. Supply Currents A minimum current has to flow into each pin for proper functioning of the IC. Table 5-1. Electrical Characteristics – Supply currents No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 2.1 Supply current at K30 Standby mod...
Page 11 - Discharger Circuit; Figure; Initial Programming of the ATA6264
11 4929B–AUTO–01/07 ATA6264 [Preliminary] 5.1 Discharger Circuit Applications using the ATA6264 usually use a reverse polarity protection diode (D1 in Figure 5-1 ) in the power supply to prevent any damage if the wrong polarity is applied to V K30 . Unfortu- nately, this method includes some risk as...
Page 12 - The following settings can be made at the initial programming:; MSBit; EXT; No external transistor at VPERI (default)
12 4929B–AUTO–01/07 ATA6264 [Preliminary] The following settings can be made at the initial programming: MSBit LSBit VR1 VR2 VR3 VR4 EXT ISO/LIN Parity Lock bit Table 5-2. Initial Programming Settings VR1 VR2 VR3 VR4 VCORE VPERI VSAT 0 0 0 0 All regulators deactivated (default) 0 0 0 1 1.88V 3.3V 7....
Page 13 - Programming Sequence
13 4929B–AUTO–01/07 ATA6264 [Preliminary] The IP data is valid only if the parity is odd. If the IP data is not valid, or if the lock bit is not set,the programming will not be executed. Figure 5-2. Programming Sequence Remove all voltages and pinloads to get out of Test mode Transmit IP command A9x...
Page 14 - Block Diagram Start-up and Power-down Procedure
14 4929B–AUTO–01/07 ATA6264 [Preliminary] 5.3 Start-up and Power-down Procedure The ATA6264 is powered via the pin K30 (battery voltage) and via a diode or a resistor it is con-nected to the ignition key line K15. In order to detect an interruption on one of these pinscorrectly, resistors are implem...
Page 15 - Start-up Procedure if V; is Programmed to Be 5V or 2.5V; regulator will be enabled.; The Power-down Procedure Takes Place in Different Phases
15 4929B–AUTO–01/07 ATA6264 [Preliminary] Depending on the initial programming of the ATA6264, the start-up procedure takes place in dif-ferent phases. 5.3.1 Start-up Procedure if V VCORE is Programmed to Be 5V or 2.5V Phase1: After switching on the ignition key, K15 voltage will apply at pin K15. I...
Page 16 - Programmed to Be 5V or 2.5V; Programmed to Be 1.88V
16 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 5-4. Start-Up and Power-Down Procedure if V VCORE Programmed to Be 5V or 2.5V 5.3.3 Start-up Procedure if V VCORE Programmed to Be 1.88V Phase1: After switching on the ignition key, the K15 voltage will appear at pin K15. If, in addi-tion, the voltage...
Page 17 - The Power-down Procedure for V; is Programmed to be 1.88V
17 4929B–AUTO–01/07 ATA6264 [Preliminary] 5.3.4 The Power-down Procedure for V VCORE is Programmed to be 1.88V Phase1: If the ignition key is switched off, the K15 voltage will vanish at pin K15. If the serialinterface command KEYLATCH is not set, the EVZ regulator stops working. The external charge...
Page 18 - Power Supply Sequencing; (Only active when initial programming sets V; Electrical Characteristics – Power Supply Sequencing
18 4929B–AUTO–01/07 ATA6264 [Preliminary] 6. Power Supply Sequencing (Only active when initial programming sets V VCORE = 1.88V and V VPERI = 3.3V) I n o r d e r t o m e e t t h e r e q u i r e m e n t s o f s e v e r a l d u a l - v o l t a g e - s u p p l y m i c r o c o n t r o l l e r s , apower...
Page 19 - Block Diagram Power Supply Sequencing
19 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 6-2. Block Diagram Power Supply Sequencing VEVZ V VSAT V VPERI Comp VEVZ K15GOOD V K15 = 3V to 4.15V (40 mV to 175mV Hysteresis) Serial interface (KEY - LATCH) VSAT VCP Comp VSATGOOD V SAT = 6.77V to 7.2V V CORE - Regulator (200 mV to 500 mV Hysteresi...
Page 20 - Charge Pump; are; to ensure that they can be switched to a low-ohmic
20 4929B–AUTO–01/07 ATA6264 [Preliminary] 7. Charge Pump To supply the VSAT and VCORE drivers, an external charge pump is provided. Both FETs (1) are driven by the high charge pump voltage V CP to ensure that they can be switched to a low-ohmic state. For correct function of the charge pump, an exte...
Page 21 - and V; are within functional range limits, T
21 4929B–AUTO–01/07 ATA6264 [Preliminary] Necessary for operation:V EVZ = 5.5V to 40V or V K30 = 5.5V to 40V, V K15 > 3V, V VINT = 3.7V to 5.47V Operating conditions of all other supply pins:V VSAT , V VPERI and V VCORE are within functional range limits, T j = –40°C to 150°C Other pins:As define...
Page 22 - GKEY Function; Overview of the Start-up Conditions
22 4929B–AUTO–01/07 ATA6264 [Preliminary] 8. GKEY Function The GKEY function is used to enable or disable the ECU via a powerless signal. If the voltage atpin K15 is larger than 3V to 4.15V, the charge pump and the EVZ regulator (for correct EVZfunction, the K30 pin has to be connected to the batter...
Page 23 - Application With High Current Switch (GKEY Function Not Used); Electrical Characteristics – GKEY Function
23 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 8-2. Application With High Current Switch (GKEY Function Not Used) Necessary for operation:V K15 = 3V to 40V, V K30 = 3.85V to 40V Operating conditions of all other supply pins:V EVZ , V SAT , V PERI and V CORE are within functional range limits, T j ...
Page 24 - EVZ Step-up Regulator; EVZ Regulator With External Divider
24 4929B–AUTO–01/07 ATA6264 [Preliminary] 9. EVZ Step-up Regulator A boost converter generates the supply voltage for energy reserve and firing capacitors in thesystem. Using a voltage divider at pin FBEVZ, this voltage can be adjusted between 15V and40V. Thus, high-voltage charged capacitors will b...
Page 25 - EVZ Regulator With Internal Divider
25 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 9-2. EVZ Regulator With Internal Divider A draft formula for calculating the EVZ voltage, which is programmed by the external voltagedivider network at pin FBEVZ, is: The pins EVZ and FBEVZ have to be shorted in applications without an external divide...
Page 29 - Electrical Characteristics (Continued)– EVZ Step-up Regulator
29 4929B–AUTO–01/07 ATA6264 [Preliminary] Error Amplifier 8.32 Output current at pin COMEVZO sinking to low COMEVZO I COMEVZO 0.4 3 mA A 8.33 Output current at pin COMEVZO driving to high COMEVZO I COMEVZO –1000 –150 µA A 8.34 Input offset voltage –10 +10 mV D 8.35 DC open-loop gain 70 dB D 8.36 Uni...
Page 30 - VSAT Power Supply; Figure 10-1. Functional Principle of the VSAT Regulator
30 4929B–AUTO–01/07 ATA6264 [Preliminary] 10. VSAT Power Supply A s t a b i l i z e d V S A T s u p p l y i s r e a l i z e d b y a b u c k c o n v e r t e r . A n e x t e r n a l i n d u c t a n c e i sPWM-switched with a frequency of 200 kHz via an internal high-side DMOS power transistor.The VSAT...
Page 32 - Electrical Characteristics (Continued)– VSAT Power Supply
32 4929B–AUTO–01/07 ATA6264 [Preliminary] 9.15 Overcurrent switch-on time Time between reaching overcurrent and reaching 90% of V SVSAT maximum under on condition SVSAT t SVSAToff 0 0.5 µs A 9.16 Leakage current at pin SVSAT Output transistor off SVSAT I SVSAT –10 +10 µA A Error Amplifier 9.17 Maxim...
Page 33 - VPERI Power Supply; With the V; Figure 11-1. Functional Principle of the V; Regulator
33 4929B–AUTO–01/07 ATA6264 [Preliminary] 11. VPERI Power Supply With the V PERI regulator a stabilized and ripple-free voltage is generated out of the VSAT supply voltage. This voltage is intended to be used for sensitive components, for example, sensors orreference inputs of A/D converters from mi...
Page 35 - VCORE Power Supply; Figure 12-1. Functional Principle of the VCORE Regulator
35 4929B–AUTO–01/07 ATA6264 [Preliminary] 12. VCORE Power Supply The voltage of the VCORE regulator is generated out of the K30 voltage using a step-down reg-u l a t o r a s l o n g a s t h e K 3 0 v o l t a g e i s a v a i l a b l e . D u r i n g t i m e s w h e n K 3 0 i s n o t p r e s e n t(powe...
Page 37 - Electrical Characteristics (Continued)– VCORE Power Supply
37 4929B–AUTO–01/07 ATA6264 [Preliminary] 11.12 Output transistor switch-off time Time between reaching0.1 × (V K30max – V VCOREmin ) and 0.9 × (V K30max – V VCOREmin ) or0.1 × (V EVZmax – V VCOREmin ) and0.9 × (V EVZmax – V VCOREmin ) SVCORE t SVCOREoff 150 ns A 11.13 Overvoltage at pin VCORE for s...
Page 39 - USP Comparator for General Purpose; status register bit b7 stays high.; Figure 13-1. Functional Principle of the USP Comparator; Electrical Characteristics – USP Comparator for General Purpose
39 4929B–AUTO–01/07 ATA6264 [Preliminary] 13. USP Comparator for General Purpose The USP comparator is used for general purposes, for example, low battery detection. An exter-nal resistive voltage divider provides the input signal for pin USP. A missing USP connection orV USP < 2.44V sets the sta...
Page 40 - Reference Voltage and Reference Current Generation; Section 4. ”Functional Range” on page 8
40 4929B–AUTO–01/07 ATA6264 [Preliminary] 14. Reference Voltage and Reference Current Generation The pin IREF is an output derived directly from the chip’s internal reference voltage. This refer-ence source is a band gap. All internally used precise voltages are derived from this band-gapvoltage. At...
Page 43 - RESQ and RESQ2 have to be set to low if V; or V; are below the specified threshold.
43 4929B–AUTO–01/07 ATA6264 [Preliminary] The RESQ2 signal results from a logical AND of the Reset signal and an OK signal from thewatchdog circuitry, so RESQ2 will go high after the watchdog triggers correctly. RESQ and RESQ2 have to be set to low if V VPERI or V EVZ are below the specified thresho...
Page 47 - Watchdog Function; • Watchdog trigger has to be done via the serial interface; Figure 16-1. Watchdog Trigger Functional Principle
47 4929B–AUTO–01/07 ATA6264 [Preliminary] 16. Watchdog Function To verify the proper function of the microcontroller, watchdog logic is included. As the ATA6264is powered up, the RESQ2 signal stays low until the first valid watchdog trigger is detected. Features: • Watchdog trigger has to be done vi...
Page 48 - Requirements for successful trigger:; Figure 16-2. Reconfiguration Prescaler Functional Principle
48 4929B–AUTO–01/07 ATA6264 [Preliminary] Requirements for successful trigger: • Minimum one valid different serial interface command between two trigger watchdog commands is necessary. Exception: First trigger watchdog command need not be preceded by a different serial interface command. • Cyclic r...
Page 51 - Configure prescaler; Watchdog Prescaler Command
51 4929B–AUTO–01/07 ATA6264 [Preliminary] Configuration of watchdog trigger: F o r t h e c o n f i g u r a t i o n o f t h e w a t c h d o g p r e s c a l e r , a s p e c i a l s e r i a l i n t e r f a c e c o m m a n d i snecessary. Note: a, b, and c to be set as defined in Table 16-1 The status o...
Page 54 - Figure 17-1. Functional Principle of the LIN/ISO 9141 Interfaces; is within functional range limits, T
54 4929B–AUTO–01/07 ATA6264 [Preliminary] 17. LIN/ISO 9141 Interfaces The ATA6264 includes two complete ISO 9141 interfaces. Interface #1 is controlled via the pinsRxD1 and TxD1, interface #2 is controlled via the pins RxD2 and TxD2. In order to support bothISO9141 and LIN bus requirements, interfac...
Page 55 - Electrical Characteristics – LIN/ISO 9141 Interfaces
55 4929B–AUTO–01/07 ATA6264 [Preliminary] Table 17-1. Electrical Characteristics – LIN/ISO 9141 Interfaces No. Parameters Test Conditions Pin Symbol Min Typ. Max. Unit Type* General (Valid for All Modes) 16.1 Pull-up current to VPERI at pin TxD x (x = 1, 2) TxD x I TxDx –35 –50 –65 µA A 16.2 K x inp...
Page 56 - Electrical Characteristics (Continued)– LIN/ISO 9141 Interfaces
56 4929B–AUTO–01/07 ATA6264 [Preliminary] ISO 9141 Mode 16.23 Maximum baud rate K x f Kx 62.5 kBd A 16.24 Propagation delay TxD x = low to K x = low (x = 1, 2),measured from TxD x H to L to K x = 0.9 × V K30 R Kx = 510 Ω to K30, C Kx = 470 pF to GNDB K x t PDtL 1 µs A 16.25 Propagation delay TxD x =...
Page 58 - RSENS
58 4929B–AUTO–01/07 ATA6264 [Preliminary] 18. Voltage/Current Sources (IASG x Sources) For a variable resistance measurement and especially for buckle-switch detection, five constantvoltage sources, switchable between two different voltages (V1 and V2) are implemented. Thecurrent delivered by these ...
Page 59 - Figure 18-1. Functional Principle of the IASG Interface; S e c t i o n 4 . ” F u n c t i o n a l R a n g e ” o n p a g e 8
59 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 18-1. Functional Principle of the IASG Interface Necessary for operation:V VCORE and V VPERI > Reset threshold, V EVZ = 9V to 40V for operation with IASGx switched to 5V V VCORE and V VPERI > Reset threshold, V EVZ = 15V to 40V for operation wit...
Page 65 - Figure 20-1. Functional Principle of the UZP Buffer
65 4929B–AUTO–01/07 ATA6264 [Preliminary] 20. UZP Buffer The pin UZP is an analog output pin of the ATA6264. The UZP buffer is realized as a tristate out-put with the ability to drive to VPERI as well as to GNDA. The selected measurement result isgiven to the pin UZP as long as no new measurement is...
Page 67 - Chip Temperature Measurement
67 4929B–AUTO–01/07 ATA6264 [Preliminary] 21. Chip Temperature Measurement A serial interface command allows measuring a chip-temperature–dependent voltage which isgenerated by two diodes connected in series. Three 2-diode sensors are connected in paralleland located in the following blocks: VPERI, ...
Page 68 - Serial Interface Commands; Overview; Electrical Characteristics – Serial Interface Commands
68 4929B–AUTO–01/07 ATA6264 [Preliminary] 22. Serial Interface Commands 22.1 Overview All functions of the ATA6264 are triggered by 16-bit serial interface commands. Some of thesecommands are latched because their actions have to continue for a longer time. Other com-mands have to be executed as lon...
Page 70 - Set Commands; Serial interface commands other than those listed in; Set of Serial Interface Commands
70 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 22-1. Timing Serial Interface 22.2 Set Commands After a reset due to the watchdog or undervoltage, all internal control registers and decoded sig-nals are set to their default values. Serial interface commands other than those listed in Table 22-2 on ...
Page 71 - Key Latch Commands; Key latch set; Watchdog Commands; Trigger watchdog; Switch Commands; Enable EVZ switching
71 4929B–AUTO–01/07 ATA6264 [Preliminary] Because the K1 and K2 interfaces are by default switched to ISO (LIN) mode, the commands9CF0, 9CFF, 9C00, and 9C0F default to invalid commands. Table 22-3. Key Latch Commands Description MSByte LSByte Hex Code 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 Key latch set 0 ...
Page 73 - Switch V; via AMUX to; IASG Commands; FxCC; Example; UZP voltage will be influenced by the USP voltage
73 4929B–AUTO–01/07 ATA6264 [Preliminary] Because the diagnosis commands are non-latching commands, any new serial interface com-mands, except watchdog triggering (6A55) and the Kx switching commands (9Cxx), interrupt thediagnosis. Note: a, b, and c represent the IASG number in binary format; only 0...
Page 74 - Serial Interface Status Register
74 4929B–AUTO–01/07 ATA6264 [Preliminary] 22.3 Serial Interface Status Register For all serial interface commands except the test-mode commands (55AAh, AA55h, 5500h), theATA6264 status is available at the MISO line. For the status register a 16-bit structure is used,one bit for each information. Tab...
Page 75 - Test mode 1
75 4929B–AUTO–01/07 ATA6264 [Preliminary] The overtemperature bits a5, a6 and a7 are latched when overtemperature is detected. Thesebits will be reset with the next SPI command, unless overtemperature still exists. In the case of a reset, bits b4 and b5 are not set to their default state. These bits...
Page 77 - Application Circuits; Figure 24-1. Overview of a Typical Airbag System
77 4929B–AUTO–01/07 ATA6264 [Preliminary] 24. Application Circuits Figure 24-1. Overview of a Typical Airbag System COMSATO SVSAT COMEVZ FBEVZ VPERIFB VPERI VSAT COMSATI EVZ GNDB OCEVZ GEVZ K30 K15 K15 K1 CP-OUT CP K2 RESQ2 UZP RxD2 IASG1 to 5 USP IREF TxD2 RxD1 RESQ GNDD ISENS GNDA TxD1 COMCOO Seri...
Page 78 - Figure 24-2. Typical Application Circuit
78 4929B–AUTO–01/07 ATA6264 [Preliminary] Figure 24-2. Typical Application Circuit KL15 RESQ2 MISO RESQ MOSI KL30 K1 RxD1 TxD1 RxD2 TxD2 RESQ2 VINT MISO RESQ SSQ SCLK SSQ SCLK Cp K30 USP MOSI RxD1 TxD1 RxD2 UZP UZP CP-OUT CP-OUT IREF GNDB GNDD GND A K2 IASG3 IASG4 ISENS IASG5 IASG1 K1 TxD2 GEVZ EVZ ...
Page 79 - Extended Type Number; Tray; Dimensions in mm
79 4929B–AUTO–01/07 ATA6264 [Preliminary] 26. Package Information 25. Ordering Information Extended Type Number Package Remarks ATA6264-ALTW P-TQFP44 Tray ATA6264-ALQW P-TQFP44 Taped and reeled specifications according to DIN technical drawings 10 ±0.05 12 ±0.2 8 12 22 44 34 33 0.2 23 1 11 0.8 Issue...
Page 80 - History; Put datasheet in a new template
80 4929B–AUTO–01/07 ATA6264 [Preliminary] 27. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 4929B-AUTO-01/07 • Put datasheet in a new template • Section 23 “Test Mode” on p...
Page 81 - Table of Contents
81 4929B–AUTO–01/07 ATA6264 [Preliminary] 28. Table of Contents Features ..................................................................................................... 1 1 Description ............................................................................................... 1 1.1 Block D...
